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HD6432351 Datasheet, PDF (567/989 Pages) Renesas Technology Corp – The H8S/2000 CPU has an internal 32-bit architecture, is provided with sixteen 16-bit general registers and a concise | |||
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Table 13-3 BRR Settings for Various Bit Rates (Asynchronous Mode)
Bit Rate
(bit/s)
110
150
300
600
1200
2400
4800
9600
19200
31250
38400
ø = 2 MHz
ø = 2.097152 MHz
ø = 2.4576 MHz
ø = 3 MHz
Error
Error
Error
Error
n
N
(%) n
N
(%) n
N
(%) n
N
(%)
1
141 0.03 1
148 â0.04 1
174 â0.26 1
212 0.03
1
103 0.16 1
108 0.21 1
127 0.00 1
155 0.16
0
207 0.16 0
217 0.21 0
255 0.00 1
77 0.16
0
103 0.16 0
108 0.21 0
127 0.00 0
155 0.16
0
51 0.16 0
54 â0.70 0
63 0.00 0
77 0.16
0
25 0.16 0
26 1.14 0
31 0.00 0
38 0.16
0
12 0.16 0
13 â2.48 0
15 0.00 0
19 â2.34
0
6
â0
6
â2.48 0
7
0.00 0
9
â2.34
0
2
â0
2
â0
3
0.00 0
4
â2.34
0
1
0.00 0
1
â0
1
â0
2
0.00
0
1
â0
1
â0
1
0.00 â â â
Bit Rate
(bit/s)
110
150
300
600
1200
2400
4800
9600
19200
31250
38400
ø = 3.6864 MHz
Error
n
N
(%) n
2
64 0.70 2
1
191 0.00 1
1
95 0.00 1
0
191 0.00 0
0
95 0.00 0
0
47 0.00 0
0
23 0.00 0
0
11 0.00 0
0
5
0.00 0
âââ0
0
2
0.00 0
ø = 4 MHz
ø = 4.9152 MHz
Error
Error
N
(%) n
N
(%) n
70 0.03 2
207 0.16 1
103 0.16 1
207 0.16 0
103 0.16 0
51 0.16 0
25 0.16 0
12 0.16 0
6
â0
3
0.00 0
2
â0
86 0.31 2
255 0.00 2
127 0.00 1
255 0.00 1
127 0.00 0
63 0.00 0
31 0.00 0
15 0.00 0
7
0.00 0
4
â1.70 0
3
0.00 0
ø = 5 MHz
Error
N
(%)
88 â0.25
64 0.16
129 0.16
64 0.16
129 0.16
64 0.16
32 â1.36
15 1.73
7
1.73
4
0.00
3
1.73
547
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