HD6432351 Datasheet, PDF (370/989 Pages) Renesas Technology Corp – The H8S/2000 CPU has an internal 32-bit architecture, is provided with sixteen 16-bit general registers and a concise

Bits 7 to 4 are reserved; they return an undetermined value if read, and cannot be modified.
If a port 5 read is performed while P5DDR bits are set to 1, the P5DR values are read. If a port 5
read is performed while P5DDR bits are cleared to 0, the pin states are read.
After a power-on reset and in hardware standby mode, PORT5 contents are determined by the pin
states, as P5DDR and P5DR are initialized. PORT5 retains its prior state after a manual reset, and
in software standby mode.
9.6.3 Pin Functions
Port 5 pins also function as the A/D converter input pin (ADTRG). Port 5 pin functions are shown
in table 9-10.
Table 9-10 Port 5 Pin Functions
Pin
P5₃/ADTRG
Selection Method and Pin Functions
The pin function is switched as shown below according to the combination of
bits TRGS1 and TRGS0 in the A/D converter ADCR, and bit P53DDR.
P53DDR
0
1
Pin function
P5₃ input pin
P5₃ output pin
ADTRG input pin*
Note: * ADTRG input when TRGS0 = TRGS1 = 1.
P5₂
The pin function is switched as shown below according to bit P52DDR.
P52DDR
0
1
Pin function
P5₂ input pin
P5₂ output pin
P5₁
The pin function is switched as shown below according to bit P51DDR.
P51DDR
0
1
Pin function
P5₁ input pin
P5₁ output pin
P5₀
The pin function is switched as shown below according to bit P50DDR.
P50DDR
0
1
Pin function
P5₀ input pin
P5₀ output pin
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