HD6432351 Datasheet, PDF (31/989 Pages) Renesas Technology Corp – The H8S/2000 CPU has an internal 32-bit architecture, is provided with sixteen 16-bit general registers and a concise

Table 1-2 Pin Functions in Each Operating Mode (cont)
Pin No.
TFP-120 FP-128
75
83
76
84
77
85
78
86
79
87
80
88
81
89
82
90
83
91
84
92
85
93
86
94
87
95
88
96
89
97
90
98
—
99
—
100
91
101
92
102
93
103
94
104
95
105
96
106
97
107
98
108
99
109
100
110
101
111
Mode 1 Mode 2* Mode 3*
STBY
STBY
STBY
V_CC
XTAL
V_CC
XTAL
V_CC
XTAL
EXTAL EXTAL EXTAL
V_SS
V_SS
V_SS
PF₇/ø
PF₇/ø
PF₇/ø
V_CC
V_CC
V_CC
AS
AS
PF₆
RD
RD
PF₅
HWR
HWR
PF₄
LWR
LWR
PF₃
PF₂/WAIT/ PF₂/WAIT/ PF₂
BREQO BREQO
PF₁/BACK PF₁/BACK PF₁
PF₀/BREQ PF₀/BREQ PF₀
P5₀
P5₀
P5₀
P5₁
P5₁
P5₁
V_SS
V_SS
V_SS
V_SS
V_SS
V_SS
P5₂
P5₂
P5₂
P5₃/
ADTRG
P5₃/
ADTRG
P5₃/
ADTRG
AV_CC
V_ref
P4₀/AN0
P4₁/AN1
P4₂/AN2
P4₃/AN3
P4₄/AN4
P4₅/AN5
P4₆/AN6/
DA0
AV_CC
V_ref
P4₀/AN0
P4₁/AN1
P4₂/AN2
P4₃/AN3
P4₄/AN4
P4₅/AN5
P4₆/AN6/
DA0
AV_CC
V_ref
P4₀/AN0
P4₁/AN1
P4₂/AN2
P4₃/AN3
P4₄/AN4
P4₅/AN5
P4₆/AN6/
DA0
Pin Name
Mode 4 Mode 5 Mode 6* Mode 7*
STBY
STBY
STBY
STBY
V_CC
XTAL
V_CC
XTAL
V_CC
XTAL
V_CC
XTAL
EXTAL EXTAL EXTAL EXTAL
V_SS
V_SS
V_SS
V_SS
PF₇/ø
PF₇/ø
PF₇/ø
PF₇/ø
V_CC
V_CC
V_CC
V_CC
AS
AS
AS
PF₆
RD
RD
RD
PF₅
HWR
HWR
HWR
PF₄
LWR
LWR
LWR
PF₃
PF₂/LCAS/ PF₂/LCAS/ PF₂/LCAS/ PF₂
WAIT/
WAIT/
WAIT/
BREQO BREQO BREQO
PF₁/BACK PF₁/BACK PF₁/BACK PF₁
PF₀/BREQ PF₀/BREQ PF₀/BREQ PF₀
P5₀
P5₀
P5₀
P5₀
P5₁
P5₁
P5₁
P5₁
V_SS
V_SS
V_SS
V_SS
V_SS
V_SS
V_SS
V_SS
P5₂
P5₂
P5₂
P5₂
P5₃/
ADTRG
P5₃/
ADTRG
P5₃/
ADTRG
P5₃/
ADTRG
AV_CC
V_ref
P4₀/AN0
P4₁/AN1
P4₂/AN2
P4₃/AN3
P4₄/AN4
P4₅/AN5
P4₆/AN6/
DA0
AV_CC
V_ref
P4₀/AN0
P4₁/AN1
P4₂/AN2
P4₃/AN3
P4₄/AN4
P4₅/AN5
P4₆/AN6/
DA0
AV_CC
V_ref
P4₀/AN0
P4₁/AN1
P4₂/AN2
P4₃/AN3
P4₄/AN4
P4₅/AN5
P4₆/AN6/
DA0
AV_CC
V_ref
P4₀/AN0
P4₁/AN1
P4₂/AN2
P4₃/AN3
P4₄/AN4
P4₅/AN5
P4₆/AN6/
DA0
11