HD6432351 Datasheet, PDF (130/989 Pages) Renesas Technology Corp – The H8S/2000 CPU has an internal 32-bit architecture, is provided with sixteen 16-bit general registers and a concise

Program execution status
Interrupt generated? ^No
Yes
Yes
NMI
No
No
Level 7 interrupt?
Yes
Mask level 6
or below?
Yes
Level 6 interrupt? ^No
No
Yes
Level 1 interrupt? ^No
Mask level 5
No
or below?
Yes
Yes
No
Mask level 0
Yes
Save PC, CCR, and EXR
Clear T bit to 0
Hold pending
Update mask level
Read vector address
Branch to interrupt handling routine
Figure 5-6 Flowchart of Procedure Up to Interrupt Acceptance in
Interrupt Control Mode 2
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