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HD6432351 Datasheet, PDF (357/989 Pages) Renesas Technology Corp – The H8S/2000 CPU has an internal 32-bit architecture, is provided with sixteen 16-bit general registers and a concise | |||
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Table 9-5 Port 2 Pin Functions (cont)
Pin
Selection Method and Pin Functions
P23/PO3/TIOCD3
The pin function is switched as shown below according to the combination of
the TPU channel 3 setting by bits MD3 to MD0 in TMDR3, bits IOD3 to IOD0 in
TIOR3L, bits CCLR2 to CCLR0 in TCR3, bit NDER3 in NDERL, and bit
P23DDR.
TPU Channel
3 Setting
Table Below (1)
Table Below (2)
P23DDR
â
0
1
1
NDER3
â
â
0
1
Pin function
TIOCD3 output
P23
input
P23
output
PO3
output
TIOCD3 input *1
Note: 1. TIOCD3 input when MD3 to MD0 = B'0000, and IOD3 to IOD0 =
B'10xx.
TPU Channel
3 Setting
MD3 to MD0
IOD3 to IOD0
CCLR2 to
CCLR0
(2)
(1)
(2)
B'0000
B'0010
B'0000 B'0001 to â
B'0100 B'0011
B'1xxx B'0101 to
B'0111
â
â
â
Output
function
â
Output
â
compare
output
(2)
B'xx00
â
â
(1)
(2)
B'0011
Other than B'xx00
Other
than
B'110
B'110
PWM
â
mode 2
output
x: Donât care
337
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