HD6432351 Datasheet, PDF (647/989 Pages) Renesas Technology Corp – The H8S/2000 CPU has an internal 32-bit architecture, is provided with sixteen 16-bit general registers and a concise

Bit 5—A/D Start (ADST): Selects starting or stopping on A/D conversion. Holds a value of 1
during A/D conversion.
The ADST bit can be set to 1 by software, a timer conversion start trigger, or the A/D external
trigger input pin (ADTRG).
Bit 5
ADST
0
1
Description
• A/D conversion stopped
(Initial value)
• Single mode: A/D conversion is started. Cleared to 0 automatically when
conversion on the specified channel ends
• Scan mode: A/D conversion is started. Conversion continues sequentially on the
selected channels until ADST is cleared to 0 by software, a reset, or
a transition to standby mode or module stop mode.
Bit 4—Scan Mode (SCAN): Selects single mode or scan mode as the A/D conversion operating
mode. See section 15.4, Operation, for single mode and scan mode operation. Only set the SCAN
bit while conversion is stopped (ADST = 0).
Bit 4
SCAN
0
1
Description
Single mode
Scan mode
(Initial value)
Bit 3—Clock Select (CKS): Sets the A/D conversion time. Only change the conversion time
while conversion is stopped (ADST = 0).
Bit 3
CKS
0
1
Description
Conversion time = 266 states (max.)
Conversion time = 134 states (max.)
(Initial value)
Bits 2 to 0—Channel Select 2 to 0 (CH2 to CH0): Together with the SCAN bit, these bits select
the analog input channels.
Only set the input channel while conversion is stopped (ADST = 0).
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