HD6432351 Datasheet, PDF(354/989 Page) Renesas Technology Corp – The H8S/2000 CPU has an internal 32-bit architecture, is provided with sixteen 16-bit general registers and a concise

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HD6432351 Datasheet, PDF (354/989 Pages) Renesas Technology Corp – The H8S/2000 CPU has an internal 32-bit architecture, is provided with sixteen 16-bit general registers and a concise

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Table 9-5 Port 2 Pin Functions (cont)

Pin

Selection Method and Pin Functions

P26/PO6/TIOCA5

The pin function is switched as shown below according to the combination of

the TPU channel 5 setting by bits MD3 to MD0 in TMDR5, bits IOA3 to IOA0 in

TIOR5, bits CCLR1 and CCLR0 in TCR5, bit NDER6 in NDERL, and bit

P26DDR.

TPU Channel

5 Setting

Table

Below (1)

Table Below (2)

P26DDR

â

0

1

1

NDER6

â

â

0

1

Pin function

TIOCA5

output

P26

input

P26

output

PO6

output

TIOCA5 input *1

Note: 1. TIOCA5 input when MD3 to MD0 = B'0000, B'01xx, and IOA3 = 1.

TPU Channel

5 Setting

MD3 to MD0

IOA3 to IOA0

CCLR1,

CCLR0

Output

function

(2)

(1)

(2)

B'0000, B'01xx B'001x

B'0000

B'0100

B'1xxx

B'0001 to

B'0011

B'0101 to

B'0111

B'xx00

â

â

â

â

Output

â

compare

output

Note: 2. TIOCB5 output is disabled.

(1)

(1)

(2)

B'0010

B'0011

Other than B'xx00

â

Other B'01

than B'01

PWM PWM

â

mode 1 mode 2

output*2 output

x: Donât care

334

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