HD6432351 Datasheet, PDF (121/989 Pages) Renesas Technology Corp – The H8S/2000 CPU has an internal 32-bit architecture, is provided with sixteen 16-bit general registers and a concise

Table 5-4 Interrupt Sources, Vector Addresses, and Interrupt Priorities
Interrupt Source
Origin of
Vector Address*
Interrupt Vector Normal Advanced
Source Number Mode Mode
IPR
NMI
IRQ0
External 7
pin
16
H'000E H'001C
H'0020 H'0040
IPRA6 to 4
IRQ1
17
H'0022 H'0044
IPRA2 to 0
IRQ2
IRQ3
18
H'0024 H'0048
IPRB6 to 4
19
H'0026 H'004C
IRQ4
IRQ5
20
H'0028 H'0050
IPRB2 to 0
21
H'002A H'0054
IRQ6
IRQ7
22
H'002C H'0058
IPRC6 to 4
23
H'002E H'005C
SWDTEND (software
DTC
24
activation interrupt end)
H'0030 H'0060
IPRC2 to 0
WOVI (interval timer)
Watchdog 25
timer
H'0032 H'0064
IPRD6 to 4
CMI (compare match)
Refresh 26
controller
H'0034 H'0068
IPRD2 to 0
Reserved
—
27
H'0036 H'006C
IPRE6 to 4
ADI (A/D conversion end) A/D
28
H'0038 H'0070
IPRE2 to 0
Reserved
—
29
H'003A H'0074
30
H'003C H'0078
31
H'003E H'007C
TGI0A (TGR0A input
capture/compare match)
TGI0B (TGR0B input
capture/compare match)
TGI0C (TGR0C input
capture/compare match)
TGI0D (TGR0D input
capture/compare match)
TCI0V (overflow 0)
TPU
32
channel 0
33
34
35
36
H'0040 H'0080
H'0042 H'0084
H'0044 H'0088
H'0046 H'008C
H'0048 H'0090
IPRF6 to 4
Reserved
—
37
H'004A H'0094
38
H'004C H'0098
39
H'004E H'009C
Note: * Lower 16 bits of the start address.
Priority
High
Low
101