HD6432351 Datasheet, PDF (14/989 Pages) Renesas Technology Corp – The H8S/2000 CPU has an internal 32-bit architecture, is provided with sixteen 16-bit general registers and a concise

9.11.2 Register Configuration [H8S/2351 Only]............................................................. 376
9.11.3 Pin Functions ........................................................................................................ 378
9.11.4 MOS Input Pull-Up Function [H8S/2351]............................................................ 379
9.12 Port E.................................................................................................................................. 380
9.12.1 Overview............................................................................................................... 380
9.12.2 Register Configuration.......................................................................................... 381
9.12.3 Pin Functions ........................................................................................................ 383
9.12.4 MOS Input Pull-Up Function [H8S/2351 Only] .................................................. 384
9.13 Port F.................................................................................................................................. 385
9.13.1 Overview............................................................................................................... 385
9.13.2 Register Configuration.......................................................................................... 386
9.13.3 Pin Functions ........................................................................................................ 388
9.14 Port G ................................................................................................................................. 391
9.14.1 Overview............................................................................................................... 391
9.14.2 Register Configuration.......................................................................................... 392
9.14.3 Pin Functions ........................................................................................................ 394
Section 10 16-Bit Timer Pulse Unit (TPU) .................................................................. 397
10.1 Overview............................................................................................................................ 397
10.1.1 Features ................................................................................................................. 397
10.1.2 Block Diagram...................................................................................................... 401
10.1.3 Pin Configuration.................................................................................................. 402
10.1.4 Register Configuration.......................................................................................... 404
10.2 Register Descriptions ......................................................................................................... 406
10.2.1 Timer Control Register (TCR).............................................................................. 406
10.2.2 Timer Mode Register (TMDR)............................................................................. 411
10.2.3 Timer I/O Control Register (TIOR)...................................................................... 413
10.2.4 Timer Interrupt Enable Register (TIER)............................................................... 426
10.2.5 Timer Status Register (TSR) ................................................................................ 429
10.2.6 Timer Counter (TCNT)......................................................................................... 433
10.2.7 Timer General Register (TGR) ............................................................................. 434
10.2.8 Timer Start Register (TSTR) ................................................................................ 435
10.2.9 Timer Synchro Register (TSYR) .......................................................................... 436
10.2.10 Module Stop Control Register (MSTPCR)........................................................... 437
10.3 Interface to Bus Master...................................................................................................... 438
10.3.1 16-Bit Registers .................................................................................................... 438
10.3.2 8-Bit Registers ...................................................................................................... 438
10.4 Operation............................................................................................................................ 440
10.4.1 Overview............................................................................................................... 440
10.4.2 Basic Functions..................................................................................................... 441
10.4.3 Synchronous Operation ........................................................................................ 447
10.4.4 Buffer Operation ................................................................................................... 449
10.4.5 Cascaded Operation .............................................................................................. 453
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