HD6432351 Datasheet, PDF (809/989 Pages) Renesas Technology Corp – The H8S/2000 CPU has an internal 32-bit architecture, is provided with sixteen 16-bit general registers and a concise

Address Register
(low) Name Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
H’FF2C ISCRH IRQ7SCB IRQ7SCA IRQ6SCB IRQ6SCA IRQ5SCB IRQ5SCA IRQ4SCB IRQ4SCA
H’FF2D ISCRL IRQ3SCB IRQ3SCA IRQ2SCB IRQ2SCA IRQ1SCB IRQ1SCA IRQ0SCB IRQ0SCA
Module Name
Interrupt
controller
Data Bus
Width
8 bit
H’FF2E IER
IRQ7E IRQ6E IRQ5E IRQ4E IRQ3E IRQ2E IRQ1E IRQ0E
H’FF2F ISR
IRQ7F IRQ6F IRQ5F IRQ4F IRQ3F IRQ2F IRQ1F IRQ0F
H’FF30 to DTCER DTCE7 DTCE6 DTCE5 DTCE4 DTCE3 DTCE2 DTCE1 DTCE0 DTC
8 bit
H’FF35
H’FF37 DTVECR SWDTE DTVEC6 DTVEC5 DTVEC4 DTVEC3 DTVEC2 DTVEC1 DTVEC0
H’FF38 SBYCR SSBY STS2 STS1 STS0 OPE —
—
—
Power-down _{8 bit}
mode
H’FF39 SYSCR —
—
INTM1 INTM0 NMIEG —
—
RAME MCU
8 bit
H’FF3A SCKCR PSTOP —
—
—
—
SCK2 SCK1 SCK0 Clock pulse
8 bit
generator
H’FF3B MDCR —
—
—
—
—
MDS2 MDS1 MDS0 MCU
8 bit
H’FF3C MSTPCRH MSTP15 MSTP14 MSTP13 MSTP12 MSTP11 MSTP10 MSTP9 MSTP8 Power-down 8 bit
H’FF3D MSTPCRL MSTP7 MSTP6 MSTP5 MSTP4 MSTP3 MSTP2 MSTP1 MSTP0 ^mode
H'FF44 Reserved —
—
—
—
—
—
—
—
Reserved
—
H’FF46 PCR G3CMS1 G3CMS0 G2CMS1 G2CMS0 G1CMS1 G1CMS0 G0CMS1 G0CMS0 PPG
8 bit
H’FF47 PMR G3INV G2INV G1INV G0INV G3NOV G2NOV G1NOV G0NOV
H’FF48 NDERH NDER15 NDER14 NDER13 NDER12 NDER11 NDER10 NDER9 NDER8
H’FF49 NDERL NDER7 NDER6 NDER5 NDER4 NDER3 NDER2 NDER1 NDER0
H’FF4A PODRH POD15 POD14 POD13 POD12 POD11 POD10 POD9 POD8
H’FF4B PODRL POD7 POD6 POD5 POD4 POD3 POD2 POD1 POD0
H’FF4C* NDRH NDR15 NDR14 NDR13 NDR12 NDR11 NDR10 NDR9 NDR8
H’FF4D* NDRL NDR7 NDR6 NDR5 NDR4 NDR3 NDR2 NDR1 NDR0
H’FF4E* NDRH —
—
—
—
NDR11 NDR10 NDR9 NDR8
H’FF4F* NDRL —
—
—
—
NDR3 NDR2 NDR1 NDR0
Note: * If the pulse output group 2 and pulse output group 3 output triggers are the same according
to the PCR setting, the NDRH address will be H'FF4C, and if different, the address of
NDRH for group 2 will be H'FF4E, and that for group 3 will be H'FF4C. Similarly, if the
pulse output group 0 and pulse output group 1 output triggers are the same according to the
PCR setting, the NDRL address will be H'FF4D, and if different, the address of NDRL for
group 0 will be H'FF4F, and that for group 1 will be H'FF4D.
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