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| HD6432351 Datasheet, PDF (816/989 Pages) Renesas Technology Corp – The H8S/2000 CPU has an internal 32-bit architecture, is provided with sixteen 16-bit general registers and a concise | |||
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CRAâDTC Transfer Count Register A
H'F800âH'FBFF
DTC
Bit
: 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Initial value : Unde- Unde- Unde- Unde- Unde- Unde- Unde- Unde- Unde- Unde- Unde- Unde- Unde- Unde- Unde- Unde-
fined fined fined fined fined fined fined fined fined fined fined fined fined fined fined fined
Read/Write : â â â â â â â â â â â â â â â â
CRAH
CRAL
Specifies the number of DTC data transfers
CRBâDTC Transfer Count Register B
H'F800âH'FBFF
DTC
Bit
: 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Initial value : Unde- Unde- Unde- Unde- Unde- Unde- Unde- Unde- Unde- Unde- Unde- Unde- Unde- Unde- Unde- Unde-
fined fined fined fined fined fined fined fined fined fined fined fined fined fined fined fined
Read/Write : â â â â â â â â â â â â â â â â
Specifies the number of DTC block data transfers
796
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