PXN20RM Datasheet, PDF (996/1376 Pages) Freescale Semiconductor, Inc – PXN20 Microcontroller

Enhanced Serial Communication Interface (eSCI)
31.3.2.1 eSCI Baud Rate Register (eSCI_BRR)
This register provides the control value for the serial baud rate. The baud rate and clock generation is
specified in Section 31.4.3, Baud Rate and Clock Generation.
A byte write access to only the upper byte of this register (eSCI_BRR[0:7]) will not change the content of
the register. Instead, the written byte is stored internally into a shadow register. A subsequent byte write
access to only the lower byte of this register (eSCI_BRR[8:15]) updates the lower byte and copies the
contents of the shadow register into the upper byte.
A byte write access to only the lower byte of this register (eSCI_BRR[8:0]) without a preceding byte write
access to only the upper byte copies a value of all zeroes into the upper byte.
A word write access to this register updates both the lower and upper byte immediately and is the
recommended write access type for this register.
Offset: ESCI_BASE + 0x0000
0
1
2
3
4
5
6
7
8
9
10
11
R0
0
0
W
SBR
Reset 0
0
0
0
0
0
0
0
0
0
0
0
Figure 31-2. eSCI Baud Rate Register (eSCI_BRR)
Access: User read/write
12
13
14
15
0
1
0
0
Table 31-2. eSCI_BRR Field Descriptions
Field
SBR
Description
Serial Baud Rate. This field provides the baud rate control value SBR.
31.3.2.2 eSCI Control Register 1 (eSCI_CR1)
This register provides bits to configure the functionality of the module, provides the interrupt enable bits
for the interrupt flags provided in the eSCI Interrupt Flag and Status Register 1 (eSCI_IFSR1) and provides
the control bits for the transmitter and receiver.
Offset: ESCI_BASE + 0x0002
Access: User read/write
0
1
2
3
4
5
6
7
8
9
10
11
12
R
0
LOOPS
RSRC M WAKE ILT PE PT TIE TCIE RIE ILIE TE
W
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
Figure 31-3. eSCI Control Register 1 (eSCI_CR1)
13
14
15
RE RWU SBK
0
0
0
31-6
PXN20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor