PXN20RM Datasheet, PDF (199/1376 Pages) Freescale Semiconductor, Inc – PXN20 Microcontroller

System Integration Unit (SIU)
Offset: SIU_BASE + 0x0014
Access: User read/write
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R
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NMI0 NMI1
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Reset w1c w1c 0
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R _{EIF EIF EIF EIF EIF EIF EIF EIF EIF EIF EIF EIF EIF EIF EIF EIF}
W ^{15 14 13 12 11 10 9}
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Reset w1c w1c w1c w1c w1c w1c w1c w1c w1c w1c w1c w1c w1c w1c w1c w1c
Figure 8-5. SIU External Interrupt Status Register (SIU_EISR)
Table 8-7. SIU_EISR Field Descriptions
Field
Description
NMI0
NMI1
EIFn
Non-Maskable Interrupt Flag for primary CPU (Z6). NMI0 is for the primary core. This bit is set when an
edge-triggered event occurs on the corresponding NMI0 input.
0 No edge-triggered event occurred on the corresponding NMI0 input.
1 An edge-triggered event occurred on the corresponding NMI0 input.
Non-Maskable Interrupt Flag for secondary CPU (Z0). NMI1 is for the secondary core. This bit is set when an
edge-triggered event occurs on the corresponding NMI1 input.
0 No edge-triggered event occurred on the corresponding NMI1 input.
1 An edge-triggered event occurred on the corresponding NMI1 input.
External Interrupt Request Flag n. Set when an edge-triggered event occurs on the corresponding IRQn input.
0 No edge triggered event occurred on the corresponding IRQn input.
1 An edge triggered event occurred on the corresponding IRQn input.
8.3.2.5 DMA/Interrupt Request Enable Register (SIU_DIRER)
The SIU_DIRER allows the assertion of a DMA or interrupt request if the corresponding flag bit is set in
the SIU_EISR. The external interrupt request enable bits enable the interrupt. SIU_DIRER only affects
interrupts and has no effect on enabling/selecting DMA requests. There are five interrupt requests from the
SIU to the interrupt controller. The first four interrupts (0 to 3) go from the SIU to the interrupt controller.
The remaining interrupts (4 to 15) are ORed together to form one additional source to the interrupt
controller.
The EIRE bits allow selection of which external interrupt request flag bits cause assertion of the one
interrupt request signal.
Freescale Semiconductor
PXN20 Microcontroller Reference Manual, Rev. 1
8-17