PXN20RM Datasheet, PDF (1254/1376 Pages) Freescale Semiconductor, Inc – PXN20 Microcontroller

Nexus Development Interface (NDI)
The TAP controller operates at both 3.3 V and 5 V, according to the device power supply, but the Nexus
output port operates only at 3.3 V maximum and is provided only on the 256MAPBGA emulation
package.
Based on the following assumptions:
• Average message length: 20 bits
• 1 jump every 10 instructions
• MCKO capable of supporting 1/2 the system clock frequency (64 MHz maximum)
• MDO pins operate at half of the system clock speed
It is required to have 12 dedicated medium MDO pins. The N3/N2+ auxiliary port is bonded out only in
the 256-pin MAPBGA package.
Boundary scan test is supported.
36.10 Debug Port
The debug port is composed of a total number of 22 pads as described in the following Table 36-69. The
five JTAG pads are available on every device of the family and are not multiplexed.
The EVTO and EVTI functions are bonded out on dedicated 3.3 V pads on the 256MAPBGA. They are
provided on the 208MAPBGA on 5 V pads multiplexed with GPIO. The remaining NDI pins are available
as dedicated 3.3 V pads only on the 256MAPBGA package.
Table 36-69. Pin/Pad Multiplexing
Pin
TDI
TDO
TMS/
TCK
JCOMP
MCKO
MDO[0]
MDO[1]
MDO[2]
MDO[3]
MDO[4]
MDO[5]
MDO[6]
MDO[7]
MDO[8]
Debug Port
JTAG
JTAG
JTAG
JTAG
JTAG
N2+/3 Aux port
N2+/3 Aux port
N2+/3 Aux port
N2+/3 Aux port
N2+/3 Aux port
N2+/3 Aux port
N2+/3 Aux port
N2+/3 Aux port
N2+/3 Aux port
N2+/3 Aux port
Multiplexed?
Dedicated
Dedicated
Dedicated
Dedicated
Dedicated
Dedicated
Dedicated
Dedicated
Dedicated
Dedicated
Dedicated
Dedicated
Dedicated
Dedicated
Dedicated
Available on Available on
208 MPABGA 256 MAPBGA
Dedicated
Dedicated
Dedicated
Dedicated
Dedicated
NO
NO
NO
NO
NO
NO
NO
NO
NO
NO
Dedicated
Dedicated
Dedicated
Dedicated
Dedicated
Dedicated
Dedicated
Dedicated
Dedicated
Dedicated
Dedicated
Dedicated
Dedicated
Dedicated
Dedicated
36-104
PXN20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor