PXN20RM Datasheet, PDF (951/1376 Pages) Freescale Semiconductor, Inc – PXN20 Microcontroller

Deserial – Serial Peripheral Interface (DSPI)
The DSPI_SDR is a 32-bit register. The upper 16 bits are only used when TSB is enabled. For non-TSB
configurations, only the least 16 significant bits are used.
Offset: DSPI_BASE + 00C0
Access: Read
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
SER_DATA
W
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
R
SER_DATA
W
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Figure 30-13. DSPI DSI Serialization Data Register (DSPI_SDR)
Table 30-19. DSPI_SDR Field Description
Bits
Description
SER_DATA Serialized Data. The SER_DATA field contains the signal states of the Parallel Input signals.
30.3.2.12 DSPI DSI Alternate Serialization Data Register (DSPI_ASDR)
The DSPI_ASDR provides a means for host software to write the data to be serialized. When the TXSS
bit in the DSPI_DSICR is set, the data in the DSPI_ASDR is the source of the serialized data. Writes to
the DSPI_ASDR take effect on the next frame boundary.
The DSPI_ASDR is a 32-bit register. The upper 16 bits are only used when TSB is enabled. For non-TSB
configurations, only the least 16 significant bits are used.
Offset: DSPI_BASE + 0x00C4
Access: User read/write
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
ASER_DATA
W
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
R
ASER_DATA
W
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Figure 30-14. DSPI DSI Alternate Serialization Data Register (DSPI_ASDR)
Freescale Semiconductor
PXN20 Microcontroller Reference Manual, Rev. 1
30-25