PXN20RM Datasheet, PDF (899/1376 Pages) Freescale Semiconductor, Inc – PXN20 Microcontroller

Controller Area Network (FlexCAN)
in freeze mode. Exceptions are the BOFF_MSK, ERR_MSK, TWRN_MSK, RWRN_MSK, and
BOFF_REC bits, which can be accessed at any time.
Offset: Base + 0x0004
Access: User read/write
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
PRESDIV
W
RJW
PSEG1
PSEG2
Reset 0
0
0
0
0
0
0
0
0
0
000000
16
17v
18
19
20
21
22
R _{BOFF ERR_ CLK_}
W ^{_MSK MSK SRC}
LPB
TWRN RWRN
_ MSK _MSK
0
Reset 0
0
0
0
0
0
0
23
24
25
26
27
28
0
SMP
BOFF
_REC
TSYN
LBUF
LOM
0
0
0
000
Figure 29-6. Control Register (CANx_CTRL)
29
30
31
PROPSEG
000
Table 29-8. CANx_CTRL Field Descriptions
Bits
PRESDIV
Description
Prescaler Division Factor. Defines the ratio between the CPI clock frequency and the serial clock (SCK)
frequency. The SCK period defines the time quantum of the CAN protocol. For the reset value, the SCK
frequency is equal to the CPI clock frequency. The maximum value of this register is 0xFF, that gives a minimum
SCK frequency equal to the CPI clock frequency divided by 256. For more information, refer to Section 29.4.7.4,
Protocol Timing.
S-clock frequency = ^{C-----P----I---c---l--o---c---k----f--r--e----q---u---e----n---c---y-}
PRESDIV + 1
RJW
Resync Jump Width. Defines the maximum number of time quanta that a bit time can be changed by one
re-synchronization. One time quantum is equal to one SCK period. The valid programmable values are 0–3.
Resync Jump Width = RJW + 1
PSEG
Phase Segment 1. Defines the length of phase buffer segment 1 in the bit time. The valid programmable values
are 0–7.
Phase Buffer Segment 1 = PSEG1 + 1  Time Quanta
PSEG2
Phase Segment 2. Defines the length of phase buffer segment 2 in the bit time. The valid programmable values
are 1–7.
Phase Buffer Segment 2 = PSEG2 + 1  Time Quanta
BOFF_MSK Bus Off Mask. Provides a mask for the bus off interrupt.
0 Bus off interrupt disabled.
1 Bus off interrupt enabled.
ERR_MSK
Error Mask. Provides a mask for the error interrupt.
0 Error interrupt disabled.
1 Error interrupt enabled.
Freescale Semiconductor
PXN20 Microcontroller Reference Manual, Rev. 1
29-15