PXN20RM Datasheet, PDF (580/1376 Pages) Freescale Semiconductor, Inc – PXN20 Microcontroller

Fast Ethernet Controller (FEC)
Offset: FEC_BASE + 0x0014
Access: User read/write
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R 0 0 0 0 0 0 0 X_DES_ACTIVE 0 0 0 0 0 0 0 0
W
Reset 0 0 0 0 0 0 0
0
00000000
16 17 18 19 20 21 22
23
24
25
26
27
28
29
30
31
R0 0 0 0 0 0 0
0
00000000
W
Reset 0 0 0 0 0 0 0
0
00000000
Figure 25-5. Transmit Descriptor Active Register (TDAR)
Table 25-7. TDAR Field Descriptions
Field
Description
0–6
Reserved, should be cleared.
X_DES_ACTIVE Set to one when this register is written, regardless of the value written. Cleared by the FEC device whenever
no additional “ready” descriptors remain in the transmit ring. Also cleared when ECR[ETHER_EN] is
cleared.
8–31
Reserved, should be cleared.
25.3.4.6 Ethernet Control Register (ECR)
ECR is a read/write user register, though both fields in this register may be altered by hardware as well.
The ECR is used to enable/disable the FEC.
Offset: FEC_BASE + 0x0024
Access: User read/write
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R0 0 0 0 0 0 0 0 0 0 0 0 0 0
0
0
W
Reset 1 1 1 1 0 0 0 0 0 0 0 0 0 0
0
0
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
R 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ETHER_EN RESET
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0
0
Figure 25-6. Ethernet Control Register (ECR)
25-14
PXN20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor