PXN20RM Datasheet, PDF (1142/1376 Pages) Freescale Semiconductor, Inc – PXN20 Microcontroller

IEEE 1149.1 Test Access Port Controller (JTAGC)
TEST LOGIC
RESET
1
0
1
RUN-TEST/IDLE
0
1
SELECT-DR-SCAN
0
1
CAPTURE-DR
0
1
SELECT-IR-SCAN
0
1
CAPTURE-IR
0
SHIFT-DR
0
1
1
EXIT1-DR
0
SHIFT-IR
0
1
1
EXIT1-IR
0
PAUSE-DR
0
1
0
EXIT2-DR
1
UPDATE-DR
1
0
PAUSE-IR
0
1
0
EXIT2-IR
1
UPDATE-IR
1
0
NOTE: The value shown adjacent to each state transition in this figure represents the value of TMS at the time
of a rising edge of TCK.
Figure 35-6. IEEE 1149.1-2001 TAP Controller Finite State Machine
35-8
PXN20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor