PXN20RM Datasheet, PDF (1103/1376 Pages) Freescale Semiconductor, Inc – PXN20 Microcontroller

Field
PRESn
Table 34-21. PSR0 Field Descriptions
Description
When set, presampling is enabled for channel n.
Analog-to-Digital Converter (ADC)
34.3.2.21 Presampling Register 1 (PSR1)
The PSR1 register contains the Presampling Enable bits for group 1 channels (channels 32–63).
Address: ADC_BASE + 0x0088
Access: User read/write
0
1
2
3
4
5
6
7
8
9 10 11 12 13 14 15
R _{PRES PRES PRES PRES PRES PRES PRES PRES PRES PRES PRES PRES PRES PRES PRES PRES}
W ^{63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48}
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R _{PRES PRES PRES PRES PRES PRES PRES PRES PRES PRES PRES PRES PRES PRES PRES PRES}
W ^{47 46 43 44 43 42 41 40 39 38 37 36 35 34 33 32}
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Figure 34-22. Presampling Register 1 (PSR1)
Table 34-22. PSR1 Field Descriptions
Field
PRESn
Description
When set, presampling is enabled for channel n.
34.3.2.22 Presampling Register 2 (PSR2)
The PSR2 register contains the Presampling Enable bits for group 2 channels (channels 64–95).
Address: ADC_BASE + 0x008C
Access: User read/write
0
1
2
3
4
5
6
7
8
9 10 11 12 13 14 15
R _{PRES PRES PRES PRES PRES PRES PRES PRES PRES PRES PRES PRES PRES PRES PRES PRES}
W ^{95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80}
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R _{PRES PRES PRES PRES PRES PRES PRES PRES PRES PRES PRES PRES PRES PRES PRES PRES}
W ^{79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64}
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Figure 34-23. Presampling Register 2 (PSR2)
Freescale Semiconductor
PXN20 Microcontroller Reference Manual, Rev. 1
34-23