PXN20RM Datasheet, PDF (461/1376 Pages) Freescale Semiconductor, Inc – PXN20 Microcontroller

Chapter 19
Error Correction Status Module (ECSM)
19.1 Introduction
The error correction status module (ECSM) provides a set of registers that configure and report ECC errors
for the device including accesses to RAM and flash memory. The application may configure the device for
the types of memory errors to be reported, and then query a set of read-only status and information registers
to identify any errors that have been signaled.
There are two types of ECC errors: correctable and non-correctable. A correctable ECC error is generated
when only one bit is wrong in a 64-bit doubleword. In this case, it is corrected automatically by hardware
and no flags or other indication is set that the error occurred. A non-correctable ECC error is generated
when two or more bits in a 64-bit doubleword are incorrect. Non-correctable ECC errors cause an
interrupt, and if enabled, additional error details are available in the ECSM.
Error correction is implemented on 64 bits of data at a time, using eight bits for ECC for every 64-bit
doubleword. ECC is checked on reads and calculated on writes per the following:
1. 64 bits containing the desired byte / halfword / word or doubleword in memory is read and ECC
checked.
2. If the access is a write, then
— The new byte / halfword / word / doubleword is merged into the 64 bits.
— New ECC bits are calculated.
— The 64 bits and the new ECC bits are written back.
NOTE
To use ECC with SRAM, the SRAM memory must be written to before ECC
is enabled.
19.1.1 Features
The ECSM has this major feature:
• Registers for capturing information on platform memory errors if error-correcting codes (ECC) are
implemented.
19.2 Memory Map and Registers
This section provides a detailed description of all ECSM registers.
Freescale Semiconductor
PXN20 Microcontroller Reference Manual, Rev. 1
19-1