PXN20RM Datasheet, PDF (1229/1376 Pages) Freescale Semiconductor, Inc – PXN20 Microcontroller

Nexus Development Interface (NDI)
Nexus Reg: 0x7
31
30
29
28
27
R
AC RW
SZ
W
Reset 0
0
0
0
0
26
25
24
MAP
0
0
0
23
22
21
20
0
PR
BST
0
0
0
0
Access: User read/write
19
18
17
16
0
0
0
0
0
0
0
0
15
R
W
Reset 0
14
13
12
11
10
9
8
7
6
5
4
3
CNT
0
0
0
0
0
0
0
0
0
0
0
0
Figure 36-56. Read/Write Access Control/Status Register (RWCS)
Table 36-52. RWCS Field Description
Field
AC
RW
SZ[2:0]
MAP[2:0]
PR[1:0]
BST
CNT[13:0]
ERR
DV
Description
Access control.
0 End access
1 Start access
Read/write select.
0 Read access
1 Write access
Word size.
000 8-bit (byte)
001 16-bit (half-word)
010 32-bit (word)
011 Reserved
100–111 Reserved (default to word)
MAP select.
000 Primary memory map
001-111 Reserved
Read/write access priority.
00 Lowest access priority
01 Reserved (default to lowest priority)
10 Reserved (default to lowest priority)
11 Highest access priority
Burst control.
0 Module accesses are single bus cycle at a time.
1 Module accesses are performed as burst operation.
Access control count. Number of accesses of word size SZ
Read/write access error. See Table 36-53.
Read/write access data valid. See Table 36-53.
Table 36-53 details the status bit encodings.
2
1
0
ERR DV
0
0
0
Freescale Semiconductor
PXN20 Microcontroller Reference Manual, Rev. 1
36-79