PXN20RM Datasheet, PDF (1056/1376 Pages) Freescale Semiconductor, Inc – PXN20 Microcontroller

Inter-Integrated Circuit Bus Controller Module (I²C)
MSB
LSB
SCL
1 2 34 5 6 78 9
MSB
LSB
1 2 34 5 6 78 9
SDA
AD0 AD1 AD2 AD3 AD4 AD5 AD6 R/W
XXX D0 D1 D2 D3 D4 D5 D6 D7
Start
Signal
Calling Address
Read/ Ack
Write ^Bit
MSB
LSB
SCL
1 2 34 5 67 89
Data Byte
No Stop
Ack Signal
Bit
MSB
LSB
1 234 5 678 9
SDA AD0 AD1 AD2 AD3 AD4 AD5 AD6 R/W
XX
AD0 AD1 AD2 AD3 AD4 AD5 AD6 R/W
Start
Signal
Calling Address
Read/ Ack
Write ^Bit
Repeated
Start
Signal
New Calling Address
Read/ No Stop
Write
Ack Signal
Bit
Figure 32-10. I²C Bus Transmission Signals
32.4.1.1 START Signal
When the bus is free, i.e.,no master device is engaging the bus (both SCL and SDA lines are at logical
high), a master may initiate communication by sending a START signal. As shown in Figure 32-10, a
START signal is a high-to-low transition of SDA while SCL is high. This signal denotes the beginning of
a new data transfer (each data transfer may contain several bytes of data) and brings all slaves out of their
idle states.
SDA
SCL
START condition
STOP condition
Figure 32-11. Start and Stop conditions
32-12
PXN20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor