PXN20RM Datasheet, PDF (1221/1376 Pages) Freescale Semiconductor, Inc – PXN20 Microcontroller

36.7.2 Nexus2+ Block Diagram
Instruction
Snoop
Message
Queues
Memory Control
Nexus Development Interface (NDI)
I/O Logic
NPC
Control and
Arbitration
12
MDO[12:0]
MSEO0
MSEO1
MCKO
EVTO
EVTI
DMA
(Read/Write)
Registers
Control/Status
Registers
DMA Registers
OnCE Debug
Breakpoint/
Watchpoint
Control
TDI
TDO
TMS
TCLK
TRST
Nexus2+ Module
Nexus1 Module (within core CPU)
Figure 36-52. e200z0 Nexus2+ Functional Block Diagram
36.7.3 Nexus2+ Features
The Nexus2+ module is compliant with Class 2 of the IEEE-ISTO 5001-2003 standard, with additional
Class 3 and 4 features available. The following features are implemented:
• Program trace via branch trace messaging (BTM). Branch trace messaging displays program flow
discontinuities (direct and indirect branches, exceptions, etc.), allowing the development tool to
interpolate what transpires between the discontinuities. Thus static code may be traced.
• Ownership trace via ownership trace messaging (OTM). OTM facilitates ownership trace by
providing visibility of which process ID or operating system task is activated. An ownership trace
message is transmitted when a new process/task is activated, allowing the development tool to
trace ownership flow.
• Run-time access to embedded processor registers and memory map via the JTAG port. This allows
for enhanced download/upload capabilities.
• Watchpoint messaging via the auxiliary pins.
• Watchpoint trigger enable of program and/or data trace messaging.
• Higher speed data input/output via the auxiliary port.
• Registers for program trace, ownership trace and watchpoint trigger.
• All features controllable and configurable via the JTAG port.
Freescale Semiconductor
PXN20 Microcontroller Reference Manual, Rev. 1
36-71