PXN20RM Datasheet, PDF (284/1376 Pages) Freescale Semiconductor, Inc – PXN20 Microcontroller

Interrupts and Interrupt Controller (INTC)
Table 10-8. INTC_SSCIR[0:7] Field Descriptions
Field
SET
CLR
Description
Set Flag Bits. Writing a 1 sets the corresponding CLRn bit. Writing a 0 has no effect. Each SETn is always
read as a 0.
Clear Flag Bits. CLRn is the flag bit. Writing a 1 to CLRnx clears it provided that a 1 is not written
simultaneously to its corresponding SETn bit. Writing a 0 to CLRn has no effect.
0 Interrupt request not pending within INTC.
1 Interrupt request pending within INTC.
The software set/clear interrupt registers support the setting or clearing of software settable interrupt
request. These registers contain eight independent sets of bits to set and clear a corresponding flag bit by
software. Excepting being set by software, this flag bit behaves the same as a flag bit set within a
peripheral. This flag bit generates an interrupt request within the INTC like a peripheral interrupt request.
Writing a 1 to SETn leaves SETn unchanged at 0 but sets CLRn. Writing a 0 to SETn has no effect. CLRn
is the flag bit. Writing a 1 to CLRn clears it. Writing a 0 to CLRn has no effect. If a 1 is written
simultaneously to a pair of SETn and CLRn bits, CLRn is asserted, regardless of whether CLRn was
asserted before the write.
10.3.2.9 INTC Priority Select Registers (INTC_PSR0_3–INTC_PSR312_315)
Offset: INTC_BASE_ADDR + 0x0040
0
1
2
3
4
R
0
0
PRC_SEL0
W
Reset 0
0
0
0
0
5
6
PRI0
0
0
Access: User read/write
7
8
9
10
11
12
13
14
15
0
0
PRC_SEL1
PRI1
0
0
0
0
0
0
0
0
0
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
R
0
0
PRC_SEL2
W
PRI2
0
0
PRC_SEL3
PRI3
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Figure 10-18. INTC Priority Select Register 0–3 (INTC_PSR0–3)
Offset: INTC_BASE_ADDR + 0x0178
Access: User read/write
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R _{PRC_}
0
0
W ^SEL312
PRI312
PRC_
0
0
SEL313
PRI313
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
R _{PRC_}
0
0
W ^SEL314
PRI314
PRC_
0
0
SEL315
PRI315
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Figure 10-19. INTC Priority Select Register 312–315 (INTC_PSR312–315)
10-16
PXN20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor