PXN20RM Datasheet, PDF (1117/1376 Pages) Freescale Semiconductor, Inc – PXN20 Microcontroller

Analog-to-Digital Converter (ADC)
Address: Base + 0x00EC
Access: User read/write
0
1
2
3
4
5
6
7
8
9 10 11 12 13 14 15
R
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0 OFF
W
SET
LOAD
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
0
0
0
0
0
0
0
0
W
OFFSET_WORD
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Figure 34-33. Offset Word Register (OFFWR)
Table 34-35. OFFWR Field Descriptions
Field
Description
OFFSETLOAD Used to enable offset loading. This bit should be written before writing the OFFSET_WORD field.
OFFSET_
WORD
The offset word coefficient generated at the end of the offset cancellation phase is latched into this register.
That offset word can be also written by software. In that case, it is loaded into the analog ADC and used as the
offset cancellation word instead of the one calculated using the offset cancellation process. That field should
be written before starting conversion.
34.3.2.33 Decode Signals Delay Register (DSDR)
The DSDR register specifies the delay between the external decode signals and the start of the sampling
phase.
Address: ADC_ Base + 0x00C4
Access: User read/write
0
1
2
3
4
5
6
7
8
9 10 11 12 13 14 15
R
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
W
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
16
R
0
W
Reset 0
Field
DSD
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
0
0
0
0
0
0
0
DSD
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Figure 34-34. Decode Signals Delay Register (DSDR)
Table 34-36. DSDR Field Descriptions
Description
The delay between the external decode signals and the start of the sampling phase. It is used to take into
account the settling time of the external mux.
Freescale Semiconductor
PXN20 Microcontroller Reference Manual, Rev. 1
34-37