PXN20RM Datasheet, PDF (944/1376 Pages) Freescale Semiconductor, Inc – PXN20 Microcontroller

Deserial – Serial Peripheral Interface (DSPI)
30.3.2.5 DSPI DMA/Interrupt Request Select and Enable Register (DSPI_RSER)
The DSPI_RSER serves two purposes. It enables flag bits in the DSPI_SR to generate DMA requests or
interrupt requests. The DSPI_RSER also selects the type of request to be generated. See the individual bit
descriptions for information on the types of requests the bits support. The user must not write to the
DSPI_RSER while the DSPI is in the running state.
Offset: DSPI_BASE + 0x0030
Access: User read/write
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R _{TCF_} 0
0 _{EOQF TFUF} 0 _{TFFF TFFF_} 0
0
0
0 _RFOF 0 _{RFDF_ RFDF_}
W ^RE
_RE _RE
_RE DIRS
_RE
RE DIRS
Reset 0
00
0
000
0
0000
0
0
0
0
16
17
18
19
20 21 22
23
24
25
26
27
28
29
30
31
R0
00
0
000
0
0000
0
0
0
0
W
Reset 0
00
0
000
0
0000
0
0
0
0
Figure 30-7. DSPI DMA/Interrupt Request Select and Enable Register (DSPI_RSER)
Table 30-13. DSPI_RSER Field Descriptions
Field
Description
TCF_RE
Transmission Complete Request Enable. The TCF_RE bit enables TCF flag in the DSPI_SR to generate an
interrupt request.
0 TCF interrupt requests are disabled.
1 TCF interrupt requests are enabled.
EOQF_ RE
DSPI Finished Request Enable. The EOQF_RE bit enables the EOQF flag in the DSPI_SR to generate an
interrupt request.
0 EOQF interrupt requests are disabled.
1 EOQF interrupt requests are enabled.
TFUF_RE
Transmit FIFO Underflow Request Enable. The TFUF_RE bit enables the TFUF flag in the DSPI_SR to generate
an interrupt request.
0 TFUF interrupt requests are disabled.
1 TFUF interrupt requests are enabled.
TFFF_RE
Transmit FIFO Fill Request Enable. The TFFF_RE bit enables the TFFF flag in the DSPI_SR to generate a
request. The TFFF_DIRS bit selects between generating an interrupt request or a DMA requests.
0 TFFF interrupt requests or DMA requests are disabled.
1 TFFF interrupt requests or DMA requests are enabled.
TFFF_DIRS Transmit FIFO Fill DMA or Interrupt Request Select. The TFFF_DIRS bit selects between generating a DMA
request or an interrupt request. When the TFFF flag bit in the DSPI_SR is set, and the TFFF_RE bit in the
DSPI_RSER register is set, this bit selects between generating an interrupt request or a DMA request.
0 Interrupt request is generated.
1 DMA request is generated.
30-18
PXN20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor