PXN20RM Datasheet, PDF (893/1376 Pages) Freescale Semiconductor, Inc – PXN20 Microcontroller

Controller Area Network (FlexCAN)
Table 29-4. Message Buffer Code for Rx Buffers (continued)
Rx Code before
Rx New Frame
Description
Rx Code after
Rx New Frame
Comment
0110
OVERRUN: A frame was
overwritten into a full buffer.
0010
If the code indicates OVERRUN but the CPU reads
the C/S word and then unlocks the MB, when a new
frame is written to the MB the code returns to FULL.
0110
If the code already indicates OVERRUN, and yet
another new frame must be written, the MB is
overwritten again, and the code remains OVERRUN.
Refer to Section 29.4.4, Matching Process, for details
about overrun behavior.
0XY1¹
BUSY: FlexCAN is updating the
contents of the MB. The CPU
must not access the MB.
0010
0110
An EMPTY buffer was written with a new frame (XY
was 01).
A FULL/OVERRUN buffer was overwritten (XY was
11).
1 _{Note that for Tx MBs (see Table 29-5), the BUSY bit should be ignored on read, except when AEN bit is set in the CANx_MCR.}
c
RTR
X
X
0
1
0
0
Table 29-5. Message Buffer Code for Tx Buffers
Initial Tx
Code
Code after
Successful
Transmission
Description
1000
1001
1100
1100
1010
1110
—
—
1000
0100
1010
1010
INACTIVE: MB does not participate in the arbitration process.
ABORT: MB was configured as Tx and CPU aborted the transmission. This code is
only valid when AEN bit in CANx_MCR is asserted. MB does not participate in the
arbitration process.
Transmit data frame unconditionally once. After transmission, the MB automatically
returns to the INACTIVE state.
Transmit remote frame unconditionally once. After transmission, the MB
automatically becomes and Rx MB with the same ID.
Transmit a data frame whenever a remote request frame with the same ID is
received. This MB participates simultaneously in both the matching and arbitration
processes. The matching process compares the ID of the incoming remote request
frame with the ID of the MB. If a match occurs this MB is allowed to participate in the
current arbitration process and the CODE field is automatically updated to 1110 to
allow the MB to participate in future arbitration runs. When the frame is eventually
transmitted successfully, the Code automatically returns to 1010 to restart the
process again.
The MBM generates this code as a result of match to a remote request frame. The
data frame is transmitted unconditionally once and then the code automatically
returns to ‘1010’. The CPU can also write this code with the same effect.
29.3.3 Rx FIFO Structure
When the FEN bit is set in the CANx_MCR, the memory area from 0x80 to 0xFC(which is normally
occupied by MBs 0 to 7) is used by the reception FIFO engine. Figure 29-3 shows the Rx FIFO data
structure. The region 0x80–0x8C contains an MB structure which is the port through which the CPU reads
Freescale Semiconductor
PXN20 Microcontroller Reference Manual, Rev. 1
29-9