PXN20RM Datasheet, PDF (598/1376 Pages) Freescale Semiconductor, Inc – PXN20 Microcontroller

Fast Ethernet Controller (FEC)
Table 25-32. MII Mode
Signal Description
Transmit Clock
Transmit Enable
Transmit Data
Transmit Error
Collision
Carrier Sense
Receive Clock
Receive Data Valid
Receive Data
Receive Error
Management Data Clock
Management Data
Input/Output
EMAC Signal
FEC_TX_CLK
FEC_TX_EN
FEC_TXD[3:0]
FEC_TX_ER
FEC_COL
FEC_CRS
FEC_RX_CLK
FEC_RX_DV
FEC_RXD[3:0]
FEC_RX_ER
FEC_MDC
FEC_MDIO
The 7-wire serial mode interface (RCR[MII_MODE] = 0) operates in what is generally referred to as the
“AMD” mode. 7-wire mode connections to the external transceiver are shown in Table 25-33.
Table 25-33. 7-Wire Mode Configuration
Signal Description
Transmit Clock
Transmit Enable
Transmit Data
Collision
Receive Clock
Receive Data Valid
Receive Data
FEC Signal
FEC_TX_CLK
FEC_TX_EN
FEC_TXD0
FEC_COL
FEC_RX_CLK
FEC_RX_DV
FEC_RXD0
25.4.6 FEC Frame Transmission
The Ethernet transmitter is designed to work with almost no intervention from software. Once
ECR[ETHER_EN] is asserted and data appears in the transmit FIFO, the Ethernet MAC is able to transmit
onto the network.
When the transmit FIFO fills to the watermark (defined by the TFWR), the MAC transmit logic asserts
FEC_TX_EN and starts transmitting the preamble (PA) sequence, the start frame delimiter (SFD), and
then the frame information from the FIFO. However, the controller defers the transmission if the network
25-32
PXN20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor