PXN20RM Datasheet, PDF (88/1376 Pages) Freescale Semiconductor, Inc – PXN20 Microcontroller

Signal Description
256 MAPBGA Ball Map
(as viewed from top through the package)
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A V_SS PD0 PG1 PC12 PC9 PC7 PC2 PB13 PB10 PB8 RESET V_DDSYN XTAL EXTAL V_SSSYN V_SS A
B PD2 PD1 PG0 PC11 PC10 PC8 PC3 PB14 PB11 V_RC V_RCCTL PB9 PB2 PB0 V_DDA V_RH B
C PD3 PD4 PD14 PC14 PC13 PC5 PC6 PC1 PB15 PB12 PB6 PB4 PB3 PB1 V_SSA V_RL C
D PD5 PD6 PD15 V_DD PC15 V_DDE1 V_SS PC4 PC0 V_DD PB7 PB5 PA10 PA12 PA0 PA14 D
E PD7 PD8 PE0 PE1 MDO0 V_DDENEX V_SS V_SS V_SS V_SS V_SS V_SS PA11 PA9 PA1 PA15 E
F PD9 PD10 PE3 PE2 MDO1 V_SS V_SS V_SS V_SS V_SS V_SS V_SS PA13 _{PA8 PA3} PA2 F
G PD11 PD12 PE4 _VSS MDO2 V_SS V_SS V_SS V_SS V_SS V_SS V_{SS VDD PA7 PA5 PA4} G
H PD13 PF0 PE5 _VDD MDO3 MDO4 V_SS V_SS V_SS V_SS V_SS V_{SS VRCSEL} PG2 _{PG6 PA6} H
J PF1 PF2 TDI PE8 MDO6 MDO5 _{VSS VSS VSS VSS} V_SS V_SS V_{DDE3 PG3 PG7 PG11} J
K _{PK1 PK2} JCOMP _VDDEMLB MDO7 V_SS V_SS V_SS V_SS V_SS V_DDENEX V_SS V_{DD PG4 PG8} PG12 K
L _{PK0 PE7 TMS VDDE2 MDO8 VSS VDDENEX VSS VSS VSS VSS VSS VDD33 PG5 PG9 PG13} L
M _{PF4 PE6 TDO PE9 MDO9 MDO10 MDO11 MSEO1 MSEO0 MCKO EVTI EVTO TEST PF13 PG10 PG14} M
N _{PF6 PF3 PE10 PE11 VDD PE15 PE14 PH9 PH11 VDDE4 PH15 PJ10 VSS PF12 PH3 PG15} N
P _{PF8 PF5 TCK PE12 PE13 PK10 PH8 PH10 PH12 PH13 PH14 PJ11 PF15 PF14 PH4 PH1} P
Note: This ballmap is preliminary and
R _{PF10 PF7 PF11 PK4 PK6 PK8shouPJld0 noPt Jb2e usPeJ4d forPJb6oardPJ9 PJ12 PJ14 PH5 PH6 PH2} R
design.
T _{VSS PF9 PK3 PK5 PK7 PK9 PJ1 PJ3 PJ5 PJ7 PJ8 PJ13 PJ15 PH0 PH7 VSS} T
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Figure 3-3. PXN20 Pinout – 256-pin MAPBGA (emulation device only)
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PXN20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor