PXN20RM Datasheet, PDF (1033/1376 Pages) Freescale Semiconductor, Inc – PXN20 Microcontroller

Enhanced Serial Communication Interface (eSCI)
– eSCI Control Register 1 (eSCI_CR1)[M]:= 0
– eSCI Control Register 1 (eSCI_CR1)[PE]:= 0
– eSCI Control Register 1 (eSCI_CR1)[WAKE]:= 0
– eSCI Control Register 3 (eSCI_CR3)[M2]:= 0
• select break character length of 13 bit as required by LIN 2.0
– eSCI Control Register 2 (eSCI_CR2)[BRCL]:= 1
• select both transmitter and receiver reset on bit error detection
– eSCI LIN Control Register 1 (eSCI_LCR1)[LDBG]:= 0
• select transmission stop on bit error detection
– eSCI Control Register 2 (eSCI_CR2)[BESTP]:= 1
• select transmission DMA stop on bit error detection
– eSCI Control Register 2 (eSCI_CR2)[BSTP]:= 1
• enable both transmitter and receiver
– eSCI Control Register 1 (eSCI_CR1)[TE]:= 1
– eSCI Control Register 1 (eSCI_CR1)[RE]:= 1
31.4.6.2 LIN Frame Formats
The term LIN frame refers to a sequence of LIN byte fields preceded by a break character, both are
described in Section 31.4.2, Frame Formats. The eSCI module allows to generate LIN frames for LIN
slaves of LIN standards 1.3 and 2.0.
31.4.6.2.1 Standard LIN Frames
A standard LIN frame, shown in Figure 31-38 consists of a break character, a sync field, an ID field, zero
or more data fields, and a checksum field. The data fields and the checksum field are generated by the LIN
master for TX LIN frames and generated by the LIN slave for RX LIN frames. The header fields are always
generated by the LIN master.
Break
Synch Identifier Data 1
Data 2
Data N Checksum
Figure 31-38. Standard LIN Frame Format
31.4.6.2.2 CRC Enhanced LIN Frames
The CRC Enhanced LIN frames shown in Figure 31-39 contain two additional CRC byte fields. These
fields are located between the last data field and the Checksum field. The value of the CRC is calculated
on the same byte fields as the Checksum is calculated on. The polynom used for the CRC calculation is
defined by eSCI LIN CRC Polynomial Register (eSCI_LPR). The eSCI module generates the CRC fields
for TX frames and checks the CRC fields for RX frames if the CRC bit in the eSCI LIN Transmit Register
(eSCI_LTR) was written with a value of 1.
Freescale Semiconductor
PXN20 Microcontroller Reference Manual, Rev. 1
31-43