PXN20RM Datasheet, PDF (676/1376 Pages) Freescale Semiconductor, Inc – PXN20 Microcontroller

FlexRay Communication Controller (FlexRAY)
26.5.2.61 Receive FIFO Frame ID Rejection Filter Value Register (RFFIDRFVR)
Base + 0x0094
Write: POC:config
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R0
0
0
0
0
W
FIDRFVAL_A/FIDRFVAL_B
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Figure 26-62. Receive FIFO Frame ID Rejection Filter Value Register (RFFIDRFVR)
This register defines the filter value for the frame ID rejection filter of the selected FIFO. For details on
frame ID filtering see Section 26.6.9.9, FIFO Filtering.
Table 26-71. RFFIDRFVR Field Descriptions
Field
Description
FIDRFVAL_A Frame ID Rejection Filter Value — Filter value for the frame ID rejection filter.
FIDRFVAL_B
26.5.2.62 Receive FIFO Frame ID Rejection Filter Mask Register (RFFIDRFMR)
Base + 0x0096
Write: POC:config
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R0
0
0
0
0
W
FIDRFMSK_A/FIDRFMSK_B
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Figure 26-63. Receive FIFO Frame ID Rejection Filter Mask Register (RFFIDRFMR)
This register defines the filter mask for the frame ID rejection filter of the selected FIFO. For details on
frame ID filtering see Section 26.6.9.9, FIFO Filtering.
Table 26-72. RFFIDRFMR Field Descriptions
Field
Description
FIDRFMSK Frame ID Rejection Filter Mask — Filter mask for the frame ID rejection filter.
26.5.2.63 Receive FIFO Range Filter Configuration Register (RFRFCFR)
Base + 0x0098
16-bit write access required
Write: WMD, IBD, SEL: Any Time
SID: POC:config
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R0
0
IBD
SEL
W WMD
SID_A/SID_B
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Figure 26-64. Receive FIFO Range Filter Configuration Register (RFRFCFR)
This register provides access to the four internal frame ID range filter boundary registers of the selected
FIFO. For details on frame ID range filter see Section 26.6.9.9, FIFO Filtering.
26-62
PXN20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor