PXN20RM Datasheet, PDF (719/1376 Pages) Freescale Semiconductor, Inc – PXN20 Microcontroller

FlexRay Communication Controller (FlexRAY)
The amount of message data read from the FlexRay memory and transferred to the FlexRay bus is
determined by the following three items
1. the message buffer segment that the message buffer is assigned to, as defined by the Message
Buffer Segment Size and Utilization Register (MBSSUTR).
2. the message buffer data field size, as defined by the related field of the Message Buffer Data Size
Register (MBDSR)
3. the value of the PLDLEN field in the message buffer header field, as described in
Section 26.6.5.2.1, Frame Header Description.
If a message buffer is assigned to message buffer segment 1, and PLDLEN > MBSEG1DS, then
2 * MBSEG1DS bytes will be read from the message buffer data field and zero padding is used for the
remaining bytes for the FlexRay bus transfer. If PLDLEN < MBSEG1DS, the controller reads and
transfers 2*PLDLEN bytes. The same holds for segment 2 and MBSEG2DS.
26.6.6.2.6 Null Frame Transmission
A static slot with slot number S is assigned to the controller for channel A, if at least one transmit message
buffer is configured with the MBFIDRn[FID] set to S and MBCCFRn[CHA] set to 1. A Null Frame is
transmitted in the static slot S on channel A, if this slot is assigned to the controller for channel A, and all
transmit message buffers with MBFIDRn[FID] = S and MBCCFRn[CHA] = 1 are either not committed
(MBCCSRn[CMT] = 0), or locked by the application (MBCCSRn[LCKS] = 1), or the cycle counter filter
is enabled and does not match.
Additionally, the application can clear the commit bit of a message buffer that is in the CCMa state, which
is called uncommit or transmit abort. This message buffer will be used for null frame transmission.
As a result of the message buffer search described in Section 26.6.7, Individual Message Buffer Search,
the controller triggers the slot assigned transition SA for as many as two transmit message buffers if at least
one of the conditions mentioned above is fulfilled for these message buffers. The transition SA changes
the message buffer states from either Idle to CCSa or from HLck to HLckCCSa. In each case, these
message buffers will be used for null frame transmission in the next slot. A message buffer timing and state
change diagram for null frame transmission from Idle state is given in Figure 26-123.
SA
STS
Idle
MT ^start
MT ^start
search[s+1]
CCSa
slot s
CCNf
null frame transmit
slot s+1
Figure 26-123. Null Frame Transmission from Idle state
SSS
Idle
MT ^start
slot s+2
A message buffer timing and state change diagram for null frame transmission from HLck state is given
in Figure 26-124.
Freescale Semiconductor
PXN20 Microcontroller Reference Manual, Rev. 1
26-105