PXN20RM Datasheet, PDF (41/1376 Pages) Freescale Semiconductor, Inc – PXN20 Microcontroller

Table ii. Notational Conventions (continued)
Instruction
Operand Syntax
/
Arithmetic division
~
Invert; operand is logically complemented
&
Logical AND
|
Logical OR
^
Logical exclusive OR
<<
Shift left (example: D0 << 3 is shift D0 left 3 bits)
>>
Shift right (example: D0 >> 3 is shift D0 right 3 bits)

Source operand is moved to destination operand

Two operands are exchanged
sign-extended All bits of the upper portion are made equal to the high-order bit of the lower portion
If <condition> Test the condition. If true, the operations after then are performed. If the condition is false and the optional
then <operations> else clause is present, the operations after else are performed. If the condition is false and else is omitted,
else <operations> the instruction performs no operation. Refer to the Bcc instruction description as an example.
Subfields and Qualifiers
{}
()
d_n
Address
Bit
lsb
LSB
LSW
msb
MSB
MSW
Optional operation
Identifies an indirect address
Displacement value, n-bits wide (example: d₁₆ is a 16-bit displacement)
Calculated effective address (pointer)
Bit selection (example: Bit 3 of D0)
Least significant bit (example: lsb of D0)
Least significant byte
Least significant word
Most significant bit
Most significant byte
Most significant word
PXN20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor
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