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PXN20RM Datasheet, PDF (204/1376 Pages) Freescale Semiconductor, Inc – PXN20 Microcontroller | |||
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System Integration Unit (SIU)
Table 8-14. SIU_IDFR Field Descriptions
Field
Function
Digital Filter Length. Defines digital filter period on the IRQn inputs according to the following equation:
DFL
Filter Period = ï¨SystemClockPeriod ï´ 2DFLï© + 1ï¨S ystemClockPeriod ï©
For a 116 MHz system clock, this gives a range of 15.6 ns to 256 ïs. The minimum time of two clocks accounts for
synchronization of the IRQ input pins with the system clock.
8.3.2.12 IRQ Filtered Input Register (SIU_IFIR)
This is a read-only register that captures the output of the NMIn and IRQn digital input filters.
Offset: SIU_BASE + 0x0034
Access: User read only
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R FNMI0 FNMI1 0
0
0
0
0
0
0
0
0
0
0
0
0
0
W
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
R FI15 FI14 FI13 FI12 IFI11 FI10 FI9 FI8 FI7 FI6 FI5 FI4 FI3 FI2 FI1 FI0
W
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Figure 8-13. External IRQ Filtered Input Register (SIU_IFIR)
Table 8-15. SIU_IFIR Field Descriptions
Field
Function
FNMI0 Filtered Non-Maskable Interrupt 0. This bit is set/cleared for the corresponding NMI pin:
0 A logic one has passed through the NMI digital filter for NMI0 pin.
1 A logic zero has passed through the NMI digital filter for NMI0 pin.
FNMI1 Filtered Non-Maskable Interrupt 1. This bit is set/cleared for the corresponding NMI pin:
0 A logic one has passed through the NMI digital filter for NMI1 pin.
1 A logic zero has passed through the NMI digital filter for NMI1 pin.
FIn Filtered Input n. This bit is set/cleared for the corresponding filtered IRQ pin:
0 A logic one has passed through the IRQ digital filter for the corresponding IRQ pin.
1 A logic zero has passed through the IRQ digital filter for the corresponding IRQ pin.
8.3.2.13 Pad Configuration Registers (SIU_PCR)
The following subsections define the SIU_PCRs for all device pins that allow configuration of the pin
function, direction, and static electrical attributes. The information presented pertains to which bits and
fields are active for a given pin or group of pins, and the register reset state. The reset state of SIU_PCRs
in the following sections is prior to executing the boot-assist module (BAM) program. The BAM program
may change SIU_PCRs based on reset configuration. See the BAM section of the manual for more detail.
For all SIU_PCRs:
8-22
PXN20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor
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