PXN20RM Datasheet, PDF (153/1376 Pages) Freescale Semiconductor, Inc – PXN20 Microcontroller

Clocks, Reset, and Power (CRP)
Mode Transition: SLEEP
1
From Figure 6-15
RUN
2 _{- Enable isolation}
for mem/analog blks
- Isolate CRP block
- Safe state pads
- RAMs in standby
- Bias resistor on
3
- Assert system POR
4
- Negate prerun
(pgates)
5
-Negate run
(pgates)
- RAMs sbias
1-3 clks from wakeup
edge if 16 MHz_IRC
enabled (depends
on where pin
wakeup edge
occurred), 3 clks +
16 MHz_IRC start up
time if disabled
7
- Assert PMC run
- Enable LVIs
- Bias resistor on
6
- Negate PMC run
- Disable LVI
2 clks ^{(LVI12 still active)}
- Bias resistor off
- Enable Wakeup
wakeup = 1
wakeup = 0
(disable 16M IRC & clkgate,
if not wakeup or RTC clock)
8
9
- Assert prerun
(pgates)
- Assert run
(pgates)
wait
50 usec
wait
10 clocks
wait
10
- Disable isolation
11
- Start clocks
12
Go to Figure 6-17
Figure 6-16. SLEEP Mode Transition Diagram (Part 1)
Freescale Semiconductor
PXN20 Microcontroller Reference Manual, Rev. 1
6-21