PXN20RM Datasheet, PDF (355/1376 Pages) Freescale Semiconductor, Inc – PXN20 Microcontroller

Flash Memory Array and Control
Whenever a program operation occurs, ECC bits are programmed. ECC is handled on a 64-bit boundary.
Thus, if only one word in any given 64-bit ECC segment is programmed, the adjoining word (in that
segment) should not be programmed because ECC calculation has already completed for that 64-bit
segment. Attempts to program the adjoining word will probably result in an operation failure. It is
recommended that all programming operations be from 64 bits to 128 bits, and be 64-bit aligned. The
programming operation should completely fill selected ECC segments within the page.
The program operation consists of the following sequence of events:
1. Change the value in the MCR[PGM] bit from a 0 to a 1.
NOTE
Ensure the block that contains the address to be programmed is unlocked.
See Section 12.3.2.2, Low/Mid Address Space Block Locking Register
(LML), Section 12.3.2.3, High Address Space Block Locking Register
(HBL), and Section 12.3.2.4, Secondary Low/Mid Address Space Block
Locking Register (SLL), for more information.
2. Write the first address to be programmed in the flash module with the program data. This write is
referred to as a program data interlock write. An interlock write may be either be an aligned word
or doubleword.
3. If more than one word or doubleword is to be programmed, write each additional address in the
page with data to be programmed. This is referred to as a program data write. All unwritten data
words default to 0xFFFF_FFFF.
4. Write a logic 1 to the MCR[EHV] bit to start the internal program sequence or skip to step 9 to
terminate.
5. Wait until the MCR[DONE] bit goes high.
6. Confirm MCR[PEG] = 1.
7. Write a logic 0 to the MCR[EHV] bit.
8. If more addresses are to be programmed, return to step 2.
9. Write a logic 0 to the MCR[PGM] bit to terminate the program sequence.
The program sequence is presented graphically in Figure 12-22. The program suspend operation detailed
in Figure 12-22 is discussed in Section 12.4.1.3.2, Flash Program Suspend/Resume.
The first write after a program is initiated determines the page address to be programmed. Program may
be initiated with the 0 to 1 transition of the MCR[PGM] bit or by clearing the MCR[EHV] bit at the end
of a previous program. This first write is referred to as an interlock write. If the program is not an
erase-suspended program, the interlock write determines if the shadow or normal array space will be
programmed and causes MCR[PEAS] to be set/cleared.
In the case of an erase-suspended program, the value in MCR[PEAS], is retained from the erase.
An interlock write must be performed before setting MCR[EHV]. The user may terminate a program
sequence by clearing MCR[PGM] prior to setting MCR[EHV].
If multiple writes are done to the same location the data for the last write is used in programming.
Freescale Semiconductor
PXN20 Microcontroller Reference Manual, Rev. 1
12-29