PXN20RM Datasheet, PDF(111/1376 Page) Freescale Semiconductor, Inc – PXN20 Microcontroller

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PXN20RM Datasheet, PDF (111/1376 Pages) Freescale Semiconductor, Inc – PXN20 Microcontroller

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Signal Description

3.4.15.15 Clock Synthesizer Ground Input

VSSSYN

VSSSYN is the ground reference input for the FMPLL clock synthesizer.

NOTE

If VDDEMLB is greater than VDD33, then the PK0-2 pins will have extra

leakage current if the pin is low (either output drive low, external drive low,

or internal pull-down). Typical leakage currents at room temperature is

0.1ÂµA per pin for a differential voltage of 0.18V, 1ÂµA per per for a

differential voltage of 0.27V, 5ÂµA per pin for a differential voltage of 0.33V

up to 300ÂµA per pin for a differential voltage of 0.5V. If the internal pull

devices are enabled, then the extra current will add to the make the internal

pullup stronger and will weaken the internal pulldown. Note that the Nexus

pins in the 256MAPBGA development package also have this issue if

VDDENEX is greater than VDD33, but there is no issue in the

208MAPBGA package since VDDENEX is grounded. In order to avoid

this, design a circuitry which will allow for extra leakage if there is the

possibility that the VDDEMLB or VDDENEX supply can be greater than

VDD33.

Freescale Semiconductor

PXN20 Microcontroller Reference Manual, Rev. 1

3-43

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