PXN20RM Datasheet, PDF (916/1376 Pages) Freescale Semiconductor, Inc – PXN20 Microcontroller

Controller Area Network (FlexCAN)
29.4.5.1 Transmission Abort Mechanism
The abort mechanism provides a safe way to request the abortion of a pending transmission. A feedback
mechanism is provided to inform the CPU if the transmission was aborted or if the frame could not be
aborted and was transmitted instead. To maintain backwards compatibility, the abort mechanism must be
explicitly enabled by asserting the AEN bit in the CANx_MCR.
In order to abort a transmission, the CPU must write a specific abort code (1001) to the code field of the
control and status word. When the abort mechanism is enabled, the active MBs configured as transmission
must be aborted first and then they may be updated. If the abort code is written to an MB that is currently
being transmitted, or to an MB that was already loaded into the SMB for transmission, the write operation
is blocked and the MB is not deactivated, but the abort request is captured and kept pending until one of
the following conditions are satisfied:
• The module loses the bus arbitration
• There is an error during the transmission
• The module is put into freeze mode
If none of conditions above are reached, the MB is transmitted correctly, the interrupt flag is set in the
CANx_IFLAG register and an interrupt to the CPU is generated (if enabled). The abort request is
automatically cleared when the interrupt flag is set. In the other hand, if one of the above conditions is
reached, the frame is not transmitted, therefore the abort code is written into the code field, the interrupt
flag is set in the CANx_IFLAG and an interrupt is (optionally) generated to the CPU.
If the CPU writes the abort code before the transmission begins internally, then the write operation is not
blocked, therefore the MB is updated and no interrupt flag is set. In this way the CPU needs to read the
abort code to make sure the active MB was deactivated. Although the AEN bit is asserted and the CPU
wrote the abort code, in this case the MB is deactivated and not aborted, because the transmission did not
start yet. One MB is only aborted when the abort request is captured and kept pending until one of the
previous conditions are satisfied.
The abort procedure can be summarized as follows:
• CPU writes 1001 into the code field of the C/S word
• CPU reads the CODE field and compares it to the value that was written
• If the CODE field that was read is different from the value that was written, the CPU must read the
corresponding CANx_IFLAG to check if the frame was transmitted or it is being currently
transmitted. If the corresponding CANx_IFLAG is set, the frame was transmitted. If the
corresponding CANx_IFLAG is reset, the CPU must wait for it to be set, and then the CPU must
read the CODE field to check if the MB was aborted (CODE = 1001) or it was transmitted
(CODE = 1000).
29.4.5.2 Message Buffer Deactivation
Deactivation is mechanism provided to maintain data coherence when the CPU writes to the control and
status word of active MBs out of freeze mode. Any CPU write access to the control and status word of an
MB causes that MB to be excluded from the transmit or receive processes during the current matching or
arbitration round. The deactivation is temporary, affecting only for the current match/arbitration round.
29-32
PXN20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor