PXN20RM Datasheet, PDF (1261/1376 Pages) Freescale Semiconductor, Inc – PXN20 Microcontroller

Memory Map
Table A-2. PXN20 System Memory Map
Address
Start
End
Size
{KB}
Region Name
Comments
Unimple- Unimple-
mented on mented on
PXN21
PXN20
Flash (AXBS Port S0 and S1)
0x0000_0000
0x0000_4000
0x0000_8000
0x0000_C000
0x0001_0000
0x0001_4000
0x0001_8000
0x0001_C000
0x0002_0000
0x0003_0000
0x0004_0000
0x0006_0000
0x0008_0000
0x000C_0000
0x0010_0000
0x0014_0000
0x0018_0000
0x001C_0000
0x0020_0000
0x00FF_C000
0x0100_0000
0x2000_0000
0x0000_3FFF
0x0000_7FFF
0x0000_BFFF
0x0000_FFFF
0x0001_3FFF
0x0001_7FFF
0x0001_BFFF
0x0001_FFFF
0x0002_FFFF
0x0003_FFFF
0x0005_FFFF
0x0007_FFFF
0x000B_FFFF
0x000F_FFFF
0x0013_FFFF
0x0017_FFFF
0x001B_FFFF
0x001F_FFFF
0x00FF_BFFF
0x00FF_FFFF
0x1FFF_FFFF
0x3FFF_FFFF
16 Program/Data Flash or Test
Test Row is
Row
accessible if the
TST0[TRE] bit in the
Flash configuration
block is set
16
Program/Data Flash
16
Program/Data Flash
16
Program/Data Flash
16
Program/Data Flash
16
Program/Data Flash
16
Program/Data Flash
16
Program/Data Flash
64
Program/Data Flash
64
Program/Data Flash
128
Program/Data Flash
128
Program/Data Flash
256
Program/Data Flash
256
Program/Data Flash
256
Program/Data Flash
256
Program/Data Flash
256
Program/Data Flash
256
Program/Data Flash
14,320
Reserved
16
Shadow Row
507,904 Flash Emulation Mapping
524,288
Reserved
SRAM (AXBS Ports S2 and S3)
0x4000_0000 0x4007_FFFF
512
0x4008_0000 0x4009_3FFF
80
0x4009_4000 0x400F_FFFF 432
SRAM (AXBS Port S2)
SRAM (AXBS Port S3)
Reserved
This 1Mbyte address
space is mirrored
512 times in the
address range
0x4000_0000 to
0x5FFF_FFFF
> 128 KB
X
PXN20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor
A-3