PXN20RM Datasheet, PDF (901/1376 Pages) Freescale Semiconductor, Inc – PXN20 Microcontroller

Controller Area Network (FlexCAN)
Table 29-8. CANx_CTRL Field Descriptions
Bits
Description
LOM
Listen-Only Mode. Configures FlexCAN to operate in listen-only mode. In this mode, the FlexCAN module
receives messages without giving any acknowledge. It is not possible to transmit any message in this mode.
0 FlexCAN module is in normal active operation, listen only mode is deactivated.
1 FlexCAN module is in listen only mode operation.
PROPSEG Propagation Segment. Defines the length of the propagation segment in the bit time. The valid programmable
values are 0–7.
Propagation Segment Time = (PROPSEG + 1)  Time Quanta
Time Quantum = one S clock period
29.3.4.3 Free-Running Timer (CANx_TIMER)
This register represents a 16-bit free-running counter that can be read and written by the CPU. The timer
starts from 0x0000 after Reset, counts linearly to 0xFFFF, and wraps around.
The timer is clocked by the FlexCAN bit-clock (which defines the baud rate on the CAN bus). During a
message transmission/reception, it increments by one for each bit that is received or transmitted. When
there is no message on the bus, it counts using the previously programmed baud rate. During Freeze Mode,
the timer is not incremented.
The timer value is captured at the beginning of the identifier field of any frame on the CAN bus. This
captured value is written into the Time Stamp entry in a message buffer after a successful reception or
transmission of a message.
Writing to the timer is an indirect operation. The data is first written to an auxiliary register and then an
internal request/acknowledge procedure across clock domains is executed. All this is transparent to the
user, except for the fact that the data takes some time to be actually written to the register. If desired,
software can poll the register to discover when the data was actually written.
Offset: Base + 0x0008
Access: User read/write
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
W
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
R
TIMER
W
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Figure 29-7. Free-Running Timer (CANx_TIMER)
29.3.4.4 Rx Mask Registers
By negating the CANx_MCR[BCC] bit, the CANx_RXGMASK, CANx_RX14MASK, and
CANx_RX15MASK registers are used as acceptance masks for received frame IDs. Three masks are
Freescale Semiconductor
PXN20 Microcontroller Reference Manual, Rev. 1
29-17