PXN20RM Datasheet, PDF (442/1376 Pages) Freescale Semiconductor, Inc – PXN20 Microcontroller

Memory Protection Unit (MPU)
e200z6
eDMA
MLB
FEC
FlexRay
e200z0
Master ID 0 (8 for Nexus)
Master ID 2
Master ID 5
Master ID 4
Master ID 6
Master ID 1
(Master ID 3, 7 not used)
AXBS
ports
Master
Slave
m0
s0
m1
s1
m2
s2
m3
s3
m6
s6
m7
s7
Flash Port 0 (e200z6)
Flash Port 1
512K SRAM
80K SRAM
AIPS_A
AIPS_B
Note: AXBS Master port numbers
do not correspond to Master ID numbers.
MPU0 MPU1 MPU2 MPU3
MPU
Figure 18-1. MPU Connections to AXBS-lite
Table 18-1. Master Assignments and Master IDs
AXBS Port
M0
M1
M2
M3
M6
M7
AXBS Module
Z6 Core
Z6 Nexus
eDMA
Off Platform (MLB)
FEC
Off Platform (FlexRay)
Z0 Core
Master ID
0
8
2
5
4
6
1
Figure 18-2.
18.1.2 Features
The MPU has these major features:
Support for 16 memory region descriptors, each 128 bits in size
— Specification of start and end addresses provide granularity for region sizes from 32 bytes to
4 GB
— MPU is invalid at reset, thus no access restrictions are enforced
18-2
PXN20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor