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PXN20RM Datasheet, PDF (680/1376 Pages) Freescale Semiconductor, Inc – PXN20 Microcontroller | |||
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FlexRay Communication Controller (FlexRAY)
Table 26-77. Protocol Configuration Register Fields (continued)
Name
Description1
Min Max
Unit
PCR
cluster_drift_damping
pClusterDriftDamping
ïT
24
comp_accepted_startup_range_a
pdAcceptedStartupRange -
pDelayCompensation[A]
ïT
22
comp_accepted_startup_range_b
pdAcceptedStartupRange -
pDelayCompensation[B]
ïT
26
listen_timeout
pdListenTimeout - 1
ïT
14/15
key_slot_id
pKeySlotId
number 18
key_slot_used_for_startup
pKeySlotUsedForStartup
bool
11
key_slot_used_for_sync
pKeySlotUsedForSync
bool
11
latest_tx
gNumberOfMinislots - pLatestTx
minislot 21
sync_node_max
gSyncNodeMax
number 30
micro_initial_offset_a
pMicroInitialOffset[A]
ïT
20
micro_initial_offset_b
pMicroInitialOffset[B]
ïT
20
micro_per_cycle
pMicroPerCycle
ïT
22/23
micro_per_cycle_min
pMicroPerCycle - pdMaxDrift
ïT
24/25
micro_per_cycle_max
pMicroPerCycle + pdMaxDrift
ïT
26/27
micro_per_macro_nom_half
round(pMicroPerMacroNom / 2)
ïT
7
offset_correction_out
pOffsetCorrectionOut
ïT
9
rate_correction_out
pRateCorrectionOut
ïT
14
single_slot_enabled
pSingleSlotEnabled
bool
10
wakeup_channel
pWakeupChannel
see Table 26-78
10
wakeup_pattern
pWakeupPattern
number 18
decoding_correction_a
pDecodingCorrection +
pDelayCompensation[A] + 2
ïT
19
decoding_correction_b
pDecodingCorrection +
pDelayCompensation[B] + 2
ïT
7
key_slot_header_crc
header CRC for key slot
0x000 0x7FF number 12
extern_offset_correction
pExternOffsetCorrection
ïT
29
extern_rate_correction
pExternRateCorrection
ïT
21
1 See FlexRay Communications System Protocol Specification, Version 2.1 Rev A for detailed protocol parameter definitions
Table 26-78. Wakeup Channel Selection
wakeup_channel Wakeup Channel
0
A
1
B
26-66
PXN20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor
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