PXN20RM Datasheet, PDF (969/1376 Pages) Freescale Semiconductor, Inc – PXN20 Microcontroller

Deserial – Serial Peripheral Interface (DSPI)
Table 30-30. Delay after Transfer Computation Example in TSB Configuration
PDT field
Tdt¹
(Tsck)
0²
0
1
1
2
2
3
3
4
1
1
3
5
7
2
2
6
10
14
3
4
12
20
28
4
8
24
40
56
5
16
48
80
112
6
32
96
160
224
7
64
192
320
448
8
128
384
640
896
9
256
768
1280
1792
10
512
1536
2560
3584
11
1024
3072
5120
7168
12
2048
6144
10240
14336
13
4096
12288
20480
28672
14
8192
24576
40960
57344
15
16384
49152
81920
114688
1 _{Some values are not reachable (e.g., 9, 11, 13, 15, 17, 18, 19...), to}
calculate these values, please see the Equation 30-3.
2 _{The values in this row were rounded to the next integer value.}
30.4.7.5 Peripheral Chip Select Strobe Enable (PCSS)
The PCSS signal provides a delay to allow the PCS signals to settle after a transition occurs, thereby
avoiding glitches. When the DSPI is in master mode and PCSSE bit is set in the DSPI_MCR, PCSS
provides a signal for an external demultiplexer to decode the PCS[0:4] signals into as many as 32
glitch-free PCS signals. Figure 30-28 shows the timing of the PCSS signal relative to PCS signals.
PCSx
PCSS
t_PCSSCK
t_PASC
Figure 30-28. Peripheral Chip Select Strobe Timing
Freescale Semiconductor
PXN20 Microcontroller Reference Manual, Rev. 1
30-43