PXN20RM Datasheet, PDF (217/1376 Pages) Freescale Semiconductor, Inc – PXN20 Microcontroller

System Integration Unit (SIU)
Table 8-22. SIU_ISEL2 Field Descriptions (continued)
Field
Description
ESEL1
ESEL0
External IRQ Input Select 1. Specifies input for IRQ1.
00 PE1 pin.
01 PF1 pin.
10 PG1 pin.
11 ISEL2A.
External IRQ Input Select 0. Specifies input for IRQ0.
00 PE0 pin.
01 PF0 pin.
10 PG0 pin.
11 ISEL2A.
8.3.2.18 IMUX Select Register 4 (SIU_ISEL4)
The SIU_ISEL4 register specifies the source for the trigger input for ADC.
Offset: SIU_BASE + 0x0910
0
1
2
3
4
5
6
7
8
9
10
11
R0
0
0
0
0
0
0
0
0000
W
Reset 0
0
0
0
0
0
0
0
0000
Access: User read/write
12
13
14
15
0
0
0
0
0
0
0
0
0
R0
W
Reset 0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
TSEL1
0
TSEL0
0
0
0
0
0
0
0
0000000
0
Figure 8-21. ADC Trigger Input Select Register 4 (SIU_ISEL4)
Table 8-23. SIU_ISEL4 Field Descriptions
Field
TSEL0
TSEL1
Description
ADC External Trigger for start of conversion.
000_0000 PE10.
000_0001 PE11.
000_0010 PE12.
000_0011 PE13.
000_0100 PIT2.
000_0101 – 111_1111 Reserved (default is PE10).
Trigger for injected trigger.
000_0000 PE10.
000_0001 PE11.
000_0010 PE12.
000_0011 PE13.
000_0100 PIT2.
000_0101 – 111_1111 Reserved (default is PE10).
Freescale Semiconductor
PXN20 Microcontroller Reference Manual, Rev. 1
8-35