PXN20RM Datasheet, PDF (883/1376 Pages) Freescale Semiconductor, Inc – PXN20 Microcontroller

Enhanced Modular Input/Output Subsystem (eMIOS200)
PRESCALED CLOCK RATIO = 1 (Bypassed)
Clock
Prescaled Clock = 1
See Note
Internal Counter 1 2 3 0 1 2 3 0 1 2 3 0 1 2 3 0 1 2 3 0 1 2 3
Match Value = 3
Note: When a match occurs, the first clock cycle is used to clear the internal counter,
starting another period.
Figure 28-57. Time Base Period when Running in the Fastest Prescaler Ratio
PRESCALED CLOCK RATIO = 3
Clock
Prescaled Clock
Internal Counter
1
2
30
0
1
2
30
0
Match Value = 3
See Note
Note: When a match occurs, the first clock cycle is used to clear the internal counter, and only
after a second edge of prescaled clock the counter will start counting.
Figure 28-58. Time Base Period when Running with a Prescaler Ratio Greater Than 1
System Clock
Input Event
Internal Counter
1
2
30
1
2
30
1
2
Match Value = 3
See Note
FLAG Set Event
FLAG Pin/Register
FLAG Clear
Note: When a match occurs, the first system clock cycle is used to clear the internal counter, and at the next edge
of prescaler clock enable the counter will start counting.
Figure 28-59. Time Base Generation with External Clock and Clear on Match Start
Freescale Semiconductor
PXN20 Microcontroller Reference Manual, Rev. 1
28-61