PXN20RM Datasheet, PDF (865/1376 Pages) Freescale Semiconductor, Inc – PXN20 Microcontroller

Enhanced Modular Input/Output Subsystem (eMIOS200)
MODE[6] = 1
Internal Counter
Cycle n
Write to A2
Match A1
Cycle n + 1
Cycle n + 2
Match A1
Write to B2
Match B1
Match B1
Write to A2
Match B1
0x000008
0x000006
0x000004
0x000002
0x000001
Due to B1 Match
Cycle n– 1
Output Pin
FLAG Set Event
A1/B1 Load Signal
A1 Value
A2 Value
B1 Value
B2 Value
EDPOL = 0
0x000002
0x000002 0x000004
0x000008
0x000008
0x000004
0x000006
0x000006
0x000006
0x000006
Figure 28-41. OPWFMB A1 and B1 Registers Update and Flags
Time
Figure 28-42 shows the operation of the output disable feature in OPWFMB mode. The output disable
forces the channel output flip-flop to EDPOL bit value. This functionality targets applications that use
active high signals and a high to low transition at A1 match. In this case EDPOL should be set to 0.
Freescale Semiconductor
PXN20 Microcontroller Reference Manual, Rev. 1
28-43