PXN20RM Datasheet, PDF (852/1376 Pages) Freescale Semiconductor, Inc – PXN20 Microcontroller

Enhanced Modular Input/Output Subsystem (eMIOS200)
MODE[6] = 1
Update to
A1 & B1 A1 Match
B1 Match
A1 Match
B1 Match
Output
Flip-Flop
Selected
Counter Bus
0x000500
0x001000
0x001100
0x001000
0x001100
FLAG
Set Event
A1 Value¹ 0xxxxxxx 0x001000
0x001000
0x001000
B1 Value² 0xxxxxxx 0x001100
0x001100
0x001100
Notes: ¹ EMIOS_CADR[n] = A1
2 _{EMIOS_CBDR[n] = B1}
A2 = A1 according to OU[n] bit
B2 = B1 according to OU[n] bit
Figure 28-25. Double Action Output Compare with FLAG Set on Both Matches
MODE[6] = 1
write to A2
EDSEL = 1
write to B2
EDPOL = x _{Output Flip-Flop}
write to A2
write to B2
write to A2
write to B2
Selected Counter Bus
0x0
0x1
0x2
0x0
0x1
0x2
0x0
0x1
0x2
System Clock
Enabled A1 Match
Enabled B1 Match
FLAG Set Event
FLAG Pin/Register
FLAG Clear
OU1
A1 Value2 0xx 0x1
A2 Value3 0xx 0x1
0x1
0x1
0x1
0x1
B1 Value4 0xx
0x2
0x2
0x2
B2 Value5 0xx 0x2
0x2
0x2
Note: 1. OU[n] bit of EMIOS_OUDR register
2. EMIOS_CADR[n] = A1 (when reading)
3. EMIOS_CADR[n] = A2 (when writing)
4. EMIOS_CBDR[n] = B1 (when reading)
5. EMIOS_CBDR[n] = B2 (when writing)
Figure 28-26. DAOC with Transfer Disabling Example
28-30
PXN20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor