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PXN20RM Datasheet, PDF (1156/1376 Pages) Freescale Semiconductor, Inc – PXN20 Microcontroller
Nexus Development Interface (NDI)
• The NDI block indicates to the MCU that it is not using the auxiliary output port. This indication
can be used to three-state the output pins or use them for another function.
36.2.2.2 Full-Port Mode
In full-port mode, all available MDO pins are used to transmit messages. All trace features are enabled or
can be enabled by writing the configuration registers via the JTAG port. Twelve MDO pins are available
in full-port mode.
36.2.2.3 Reduced-Port Mode
Reduced-port mode is not supported on the PXN20.
36.2.2.4 Disabled-Port Mode
In disabled-port mode, message transmission is disabled. Any debug feature that generates messages
cannot be used. The primary features available are class 1 features and read/write access.
36.2.2.5 Censored Mode
The NDI supports internal flash censorship mode by preventing the transmission of trace messages and
Nexus access to memory-mapped resources when censorship is enabled.
36.2.2.6 Halt Mode
Halt mode logic is implemented in the Nexus port controller (NPC). When a request is made to enter halt
mode, the NDI block completes monitoring of any pending bus transaction, transmits all messages already
queued, and acknowledges the halt request. After the acknowledgment, the system clock input are shut off
by the clock driver on the device. While the clocks are shut off, the development tool cannot access the
NDI. See Section 8.3.2.24, Halt Acknowledge Register (SIU_HLTACKn), for a description of Halt Mode
entry.
36.3 External Signal Description
The auxiliary and JTAG pin interfaces provide for the transmission of messages from Nexus modules to
the external development tools and for access to Nexus client registers. The auxiliary/JTAG pin definitions
are outlined in Table 36-1.
Table 36-1. Signal Properties
Name
EVTO
EVTI
MCKO
MDO[11:0]
MSEO[1:0]
Port
Auxiliary
Auxiliary
Auxiliary
Auxiliary
Auxiliary
Function
Event Out pin
Event In pin
Message Clock Out pin (from NPC)
Message Data Out pins
Message Start/End Out pins
36-6
PXN20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor