PXN20RM Datasheet, PDF (1248/1376 Pages) Freescale Semiconductor, Inc – PXN20 Microcontroller

Nexus Development Interface (NDI)
3. Repeat step 3 in Section 36.7.9.5.1, Single Write Access until the internal CNT value is zero (0).
When this occurs, the DV bit within the RWCS is cleared to indicate the end of the block write
access.
36.7.9.5.3 Single Read Access
1. Initialize the read/write access address register (RWA) through the access method outlined in
Section 36.7.8, Nexus2+ Register Access via JTAG / OnCE, using the Nexus register index of 0x9
(see Table 36-48). Configure as follows:
– Read Address  0xnnnn_nnnn (read address)
2. Initialize the read/write access control/status register (RWCS) through the access method outlined
in Section 36.7.8, Nexus2+ Register Access via JTAG / OnCE, using the Nexus register index of
0x7 (see Table 36-48). Configure the bits as follows:
– Access Control RWCS[AC]  0b1 (to indicate start access)
– Map Select RWCS[MAP]  0b000 (primary memory map)
– Access Priority RWCS[PR]  0b00 (lowest priority)
– Read/Write RWCS[RW]  0b0 (read access)
– Word Size RWCS[SZ]  0b0xx (32-bit, 16-bit, 8-bit)
– Access Count RWCS[CNT]  0x0000 or 0x0001 (single access)
NOTE
Access Count (CNT) of 0x0000 or 0x0001 performs a single access.
3. The Nexus2+ module then arbitrates for the system bus and the read data is transferred from the
system bus to the RWD register. When the transfer is completed without error (ERR = 0), Nexus
sets the DV bit in the RWCS register. This indicates that the device is ready for the next access.
4. The data can then be read from the read/write access data register (RWD) through the access
method outlined in Section 36.7.8, Nexus2+ Register Access via JTAG / OnCE, using the Nexus
register index of 0xA (see Table 36-48).
NOTE
The DV and ERR bits within the RWCS provide Read/Write Access status
to the external development tool.
36.7.9.5.4 Block Read Access
1. For a non-burst block read access, follow Steps 1 and 2 outlined in Section 36.7.9.5.3, Single Read
Access to initialize the registers, but using a value greater than one (0x1) for the CNT field in the
RWCS register.
The Nexus2+ module then arbitrates for the system bus and the read data is transferred from the
system bus to the RWD register. When the transfer has completed without error (ERR = 0), the
address from the RWA register is incremented to the next word size (specified in the SZ field) and
the number from the CNT field is decremented.
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PXN20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor