English
Language : 

PXN20RM Datasheet, PDF (945/1376 Pages) Freescale Semiconductor, Inc – PXN20 Microcontroller
Deserial – Serial Peripheral Interface (DSPI)
Table 30-13. DSPI_RSER Field Descriptions (continued)
Field
Description
RFOF_RE
Receive FIFO Overflow Request Enable. The RFOF_RE bit enables the RFOF flag in the DSPI_SR to generate
an interrupt requests.
0 RFOF interrupt requests are disabled.
1 RFOF interrupt requests are enabled.
RFDF_RE
Receive FIFO Drain Request Enable. The RFDF_RE bit enables the RFDF flag in the DSPI_SR to generate a
request. The RFDF_DIRS bit selects between generating an interrupt request or a DMA request.
0 RFDF interrupt requests or DMA requests are disabled.
1 RFDF interrupt requests or DMA requests are enabled.
RFDF_DIRS Receive FIFO Drain DMA or Interrupt Request Select. The RFDF_DIRS bit selects between generating a DMA
request or an interrupt request. When the RFDF flag bit in the DSPI_SR is set, and the RFDF_RE bit in the
DSPI_RSER register is set, the RFDF_DIRS bit selects between generating an interrupt request or a DMA
request.
0 Interrupt request is generated.
1 DMA request is generated.
30.3.2.6 DSPI PUSH TX FIFO Register (DSPI_PUSHR)
The DSPI_PUSHR provides a means to write to the TX FIFO. Data written to this register is transferred
to the TX FIFO. See Section 30.4.3.4, Transmit First-In First-Out (TX FIFO) Buffering Mechanism, for
more information. Write accesses of 8 or 16 bits to the DSPI_PUSHR transfer 32 bits to the TX FIFO.
NOTE
Only the TXDATA field is used for DSPI slaves.
NOTE
When the DSPI module has more than one entry in the TX FIFO and only
one entry is written and that entry has the CONT bit set, and continuous
SCK clock selected the PCS levels may change between transfer complete
and write of the next data to the DSPI_PUSHR register. To ensure PCS
stability during data transmission in Continious Selection Format and
Continious SCK clock enabled make sure that the data with reset CONT bit
is written to DSPI_PUSHR register before previous data sub-frame (with
CONT bit set) transfer is over.
Freescale Semiconductor
PXN20 Microcontroller Reference Manual, Rev. 1
30-19